subdev/fb/sddr3.c

0001 /*
0002  * Copyright 2013 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs <bskeggs@redhat.com>
0023  *      Roy Spliet <rspliet@eclipso.eu>
0024  */
0025 #include "priv.h"
0026 #include "ram.h"
0027
0028 struct ramxlat {
0029     int id;
0030     u8 enc;
0031 };
0032
0033 static inline int
0034 ramxlat(const struct ramxlat *xlat, int id)
0035 {
0036     while (xlat->id >= 0) {
0037         if (xlat->id == id)
0038             return xlat->enc;
0039         xlat++;
0040     }
0041     return -EINVAL;
0042 }
0043
0044 static const struct ramxlat
0045 ramddr3_cl[] = {
0046     { 5, 2 }, { 6, 4 }, { 7, 6 }, { 8, 8 }, { 9, 10 }, { 10, 12 },
0047     { 11, 14 },
0048     /* the below are mentioned in some, but not all, ddr3 docs */
0049     { 12, 1 }, { 13, 3 }, { 14, 5 },
0050     { -1 }
0051 };
0052
0053 static const struct ramxlat
0054 ramddr3_wr[] = {
0055     { 5, 1 }, { 6, 2 }, { 7, 3 }, { 8, 4 }, { 10, 5 }, { 12, 6 },
0056     /* the below are mentioned in some, but not all, ddr3 docs */
0057     { 14, 7 }, { 15, 7 }, { 16, 0 },
0058     { -1 }
0059 };
0060
0061 static const struct ramxlat
0062 ramddr3_cwl[] = {
0063     { 5, 0 }, { 6, 1 }, { 7, 2 }, { 8, 3 },
0064     /* the below are mentioned in some, but not all, ddr3 docs */
0065     { 9, 4 }, { 10, 5 },
0066     { -1 }
0067 };
0068
0069 int
0070 nvkm_sddr3_calc(struct nvkm_ram *ram)
0071 {
0072     int CWL, CL, WR, DLL = 0, ODT = 0;
0073
0074     DLL = !ram->next->bios.ramcfg_DLLoff;
0075
0076     switch (ram->next->bios.timing_ver) {
0077     case 0x10:
0078         if (ram->next->bios.timing_hdr < 0x17) {
0079             /* XXX: NV50: Get CWL from the timing register */
0080             return -ENOSYS;
0081         }
0082         CWL = ram->next->bios.timing_10_CWL;
0083         CL  = ram->next->bios.timing_10_CL;
0084         WR  = ram->next->bios.timing_10_WR;
0085         ODT = ram->next->bios.timing_10_ODT;
0086         break;
0087     case 0x20:
0088         CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
0089         CL  = (ram->next->bios.timing[1] & 0x0000001f) >> 0;
0090         WR  = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
0091         /* XXX: Get these values from the VBIOS instead */
0092         ODT =   (ram->mr[1] & 0x004) >> 2 |
0093             (ram->mr[1] & 0x040) >> 5 |
0094                 (ram->mr[1] & 0x200) >> 7;
0095         break;
0096     default:
0097         return -ENOSYS;
0098     }
0099
0100     CWL = ramxlat(ramddr3_cwl, CWL);
0101     CL  = ramxlat(ramddr3_cl, CL);
0102     WR  = ramxlat(ramddr3_wr, WR);
0103     if (CL < 0 || CWL < 0 || WR < 0)
0104         return -EINVAL;
0105
0106     ram->mr[0] &= ~0xf74;
0107     ram->mr[0] |= (WR & 0x07) << 9;
0108     ram->mr[0] |= (CL & 0x0e) << 3;
0109     ram->mr[0] |= (CL & 0x01) << 2;
0110
0111     ram->mr[1] &= ~0x245;
0112     ram->mr[1] |= (ODT & 0x1) << 2;
0113     ram->mr[1] |= (ODT & 0x2) << 5;
0114     ram->mr[1] |= (ODT & 0x4) << 7;
0115     ram->mr[1] |= !DLL;
0116
0117     ram->mr[2] &= ~0x038;
0118     ram->mr[2] |= (CWL & 0x07) << 3;
0119     return 0;
0120 }