subdev/fb/ramfuc.h

0001 /* SPDX-License-Identifier: MIT */
0002 #ifndef __NVKM_FBRAM_FUC_H__
0003 #define __NVKM_FBRAM_FUC_H__
0004 #include <subdev/fb.h>
0005 #include <subdev/pmu.h>
0006
0007 struct ramfuc {
0008     struct nvkm_memx *memx;
0009     struct nvkm_fb *fb;
0010     int sequence;
0011 };
0012
0013 struct ramfuc_reg {
0014     int sequence;
0015     bool force;
0016     u32 addr;
0017     u32 stride; /* in bytes */
0018     u32 mask;
0019     u32 data;
0020 };
0021
0022 static inline struct ramfuc_reg
0023 ramfuc_stride(u32 addr, u32 stride, u32 mask)
0024 {
0025     return (struct ramfuc_reg) {
0026         .sequence = 0,
0027         .addr = addr,
0028         .stride = stride,
0029         .mask = mask,
0030         .data = 0xdeadbeef,
0031     };
0032 }
0033
0034 static inline struct ramfuc_reg
0035 ramfuc_reg2(u32 addr1, u32 addr2)
0036 {
0037     return (struct ramfuc_reg) {
0038         .sequence = 0,
0039         .addr = addr1,
0040         .stride = addr2 - addr1,
0041         .mask = 0x3,
0042         .data = 0xdeadbeef,
0043     };
0044 }
0045
0046 static noinline struct ramfuc_reg
0047 ramfuc_reg(u32 addr)
0048 {
0049     return (struct ramfuc_reg) {
0050         .sequence = 0,
0051         .addr = addr,
0052         .stride = 0,
0053         .mask = 0x1,
0054         .data = 0xdeadbeef,
0055     };
0056 }
0057
0058 static inline int
0059 ramfuc_init(struct ramfuc *ram, struct nvkm_fb *fb)
0060 {
0061     int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx);
0062     if (ret)
0063         return ret;
0064
0065     ram->sequence++;
0066     ram->fb = fb;
0067     return 0;
0068 }
0069
0070 static inline int
0071 ramfuc_exec(struct ramfuc *ram, bool exec)
0072 {
0073     int ret = 0;
0074     if (ram->fb) {
0075         ret = nvkm_memx_fini(&ram->memx, exec);
0076         ram->fb = NULL;
0077     }
0078     return ret;
0079 }
0080
0081 static inline u32
0082 ramfuc_rd32(struct ramfuc *ram, struct ramfuc_reg *reg)
0083 {
0084     struct nvkm_device *device = ram->fb->subdev.device;
0085     if (reg->sequence != ram->sequence)
0086         reg->data = nvkm_rd32(device, reg->addr);
0087     return reg->data;
0088 }
0089
0090 static inline void
0091 ramfuc_wr32(struct ramfuc *ram, struct ramfuc_reg *reg, u32 data)
0092 {
0093     unsigned int mask, off = 0;
0094
0095     reg->sequence = ram->sequence;
0096     reg->data = data;
0097
0098     for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) {
0099         if (mask & 1)
0100             nvkm_memx_wr32(ram->memx, reg->addr+off, reg->data);
0101         off += reg->stride;
0102     }
0103 }
0104
0105 static inline void
0106 ramfuc_nuke(struct ramfuc *ram, struct ramfuc_reg *reg)
0107 {
0108     reg->force = true;
0109 }
0110
0111 static inline u32
0112 ramfuc_mask(struct ramfuc *ram, struct ramfuc_reg *reg, u32 mask, u32 data)
0113 {
0114     u32 temp = ramfuc_rd32(ram, reg);
0115     if (temp != ((temp & ~mask) | data) || reg->force) {
0116         ramfuc_wr32(ram, reg, (temp & ~mask) | data);
0117         reg->force = false;
0118     }
0119     return temp;
0120 }
0121
0122 static inline void
0123 ramfuc_wait(struct ramfuc *ram, u32 addr, u32 mask, u32 data, u32 nsec)
0124 {
0125     nvkm_memx_wait(ram->memx, addr, mask, data, nsec);
0126 }
0127
0128 static inline void
0129 ramfuc_nsec(struct ramfuc *ram, u32 nsec)
0130 {
0131     nvkm_memx_nsec(ram->memx, nsec);
0132 }
0133
0134 static inline void
0135 ramfuc_wait_vblank(struct ramfuc *ram)
0136 {
0137     nvkm_memx_wait_vblank(ram->memx);
0138 }
0139
0140 static inline void
0141 ramfuc_train(struct ramfuc *ram)
0142 {
0143     nvkm_memx_train(ram->memx);
0144 }
0145
0146 static inline int
0147 ramfuc_train_result(struct nvkm_fb *fb, u32 *result, u32 rsize)
0148 {
0149     return nvkm_memx_train_result(fb->subdev.device->pmu, result, rsize);
0150 }
0151
0152 static inline void
0153 ramfuc_block(struct ramfuc *ram)
0154 {
0155     nvkm_memx_block(ram->memx);
0156 }
0157
0158 static inline void
0159 ramfuc_unblock(struct ramfuc *ram)
0160 {
0161     nvkm_memx_unblock(ram->memx);
0162 }
0163
0164 #define ram_init(s,p)        ramfuc_init(&(s)->base, (p))
0165 #define ram_exec(s,e)        ramfuc_exec(&(s)->base, (e))
0166 #define ram_have(s,r)        ((s)->r_##r.addr != 0x000000)
0167 #define ram_rd32(s,r)        ramfuc_rd32(&(s)->base, &(s)->r_##r)
0168 #define ram_wr32(s,r,d)      ramfuc_wr32(&(s)->base, &(s)->r_##r, (d))
0169 #define ram_nuke(s,r)        ramfuc_nuke(&(s)->base, &(s)->r_##r)
0170 #define ram_mask(s,r,m,d)    ramfuc_mask(&(s)->base, &(s)->r_##r, (m), (d))
0171 #define ram_wait(s,r,m,d,n)  ramfuc_wait(&(s)->base, (r), (m), (d), (n))
0172 #define ram_nsec(s,n)        ramfuc_nsec(&(s)->base, (n))
0173 #define ram_wait_vblank(s)   ramfuc_wait_vblank(&(s)->base)
0174 #define ram_train(s)         ramfuc_train(&(s)->base)
0175 #define ram_train_result(s,r,l) ramfuc_train_result((s), (r), (l))
0176 #define ram_block(s)         ramfuc_block(&(s)->base)
0177 #define ram_unblock(s)       ramfuc_unblock(&(s)->base)
0178 #endif