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0024 #include "ram.h"
0025
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0029
0030
0031
0032 #define NOTE00(a) 1
0033
0034 int
0035 nvkm_gddr5_calc(struct nvkm_ram *ram, bool nuts)
0036 {
0037 int pd, lf, xd, vh, vr, vo, l3;
0038 int WL, CL, WR, at[2], dt, ds;
0039 int rq = ram->freq < 1000000;
0040
0041 xd = !ram->next->bios.ramcfg_DLLoff;
0042
0043 switch (ram->next->bios.ramcfg_ver) {
0044 case 0x11:
0045 pd = ram->next->bios.ramcfg_11_01_80;
0046 lf = ram->next->bios.ramcfg_11_01_40;
0047 vh = ram->next->bios.ramcfg_11_02_10;
0048 vr = ram->next->bios.ramcfg_11_02_04;
0049 vo = ram->next->bios.ramcfg_11_06;
0050 l3 = !ram->next->bios.ramcfg_11_07_02;
0051 break;
0052 default:
0053 return -ENOSYS;
0054 }
0055
0056 switch (ram->next->bios.timing_ver) {
0057 case 0x20:
0058 WL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
0059 CL = (ram->next->bios.timing[1] & 0x0000001f);
0060 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
0061 at[0] = ram->next->bios.timing_20_2e_c0;
0062 at[1] = ram->next->bios.timing_20_2e_30;
0063 dt = ram->next->bios.timing_20_2e_03;
0064 ds = ram->next->bios.timing_20_2f_03;
0065 break;
0066 default:
0067 return -ENOSYS;
0068 }
0069
0070 if (WL < 1 || WL > 7 || CL < 5 || CL > 36 || WR < 4 || WR > 35)
0071 return -EINVAL;
0072 CL -= 5;
0073 WR -= 4;
0074
0075 ram->mr[0] &= ~0xf7f;
0076 ram->mr[0] |= (WR & 0x0f) << 8;
0077 ram->mr[0] |= (CL & 0x0f) << 3;
0078 ram->mr[0] |= (WL & 0x07) << 0;
0079
0080 ram->mr[1] &= ~0x0bf;
0081 ram->mr[1] |= (xd & 0x01) << 7;
0082 ram->mr[1] |= (at[0] & 0x03) << 4;
0083 ram->mr[1] |= (dt & 0x03) << 2;
0084 ram->mr[1] |= (ds & 0x03) << 0;
0085
0086
0087
0088
0089 ram->mr1_nuts = ram->mr[1];
0090 if (nuts) {
0091 ram->mr[1] &= ~0x030;
0092 ram->mr[1] |= (at[1] & 0x03) << 4;
0093 }
0094
0095 ram->mr[3] &= ~0x020;
0096 ram->mr[3] |= (rq & 0x01) << 5;
0097
0098 ram->mr[5] &= ~0x004;
0099 ram->mr[5] |= (l3 << 2);
0100
0101 if (!vo)
0102 vo = (ram->mr[6] & 0xff0) >> 4;
0103 if (ram->mr[6] & 0x001)
0104 pd = 1;
0105 ram->mr[6] &= ~0xff1;
0106 ram->mr[6] |= (vo & 0xff) << 4;
0107 ram->mr[6] |= (pd & 0x01) << 0;
0108
0109 if (NOTE00(vr)) {
0110 ram->mr[7] &= ~0x300;
0111 ram->mr[7] |= (vr & 0x03) << 8;
0112 }
0113 ram->mr[7] &= ~0x088;
0114 ram->mr[7] |= (vh & 0x01) << 7;
0115 ram->mr[7] |= (lf & 0x01) << 3;
0116
0117 ram->mr[8] &= ~0x003;
0118 ram->mr[8] |= (WR & 0x10) >> 3;
0119 ram->mr[8] |= (CL & 0x10) >> 4;
0120 return 0;
0121 }