subdev/devinit/nv05.c

0001 /*
0002  * Copyright (C) 2010 Francisco Jerez.
0003  * All Rights Reserved.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining
0006  * a copy of this software and associated documentation files (the
0007  * "Software"), to deal in the Software without restriction, including
0008  * without limitation the rights to use, copy, modify, merge, publish,
0009  * distribute, sublicense, and/or sell copies of the Software, and to
0010  * permit persons to whom the Software is furnished to do so, subject to
0011  * the following conditions:
0012  *
0013  * The above copyright notice and this permission notice (including the
0014  * next paragraph) shall be included in all copies or substantial
0015  * portions of the Software.
0016  *
0017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0018  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0019  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
0020  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
0021  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
0022  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
0023  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0024  *
0025  */
0026 #include "nv04.h"
0027 #include "fbmem.h"
0028
0029 #include <subdev/bios.h>
0030 #include <subdev/bios/bmp.h>
0031 #include <subdev/bios/init.h>
0032 #include <subdev/vga.h>
0033
0034 static void
0035 nv05_devinit_meminit(struct nvkm_devinit *init)
0036 {
0037     static const u8 default_config_tab[][2] = {
0038         { 0x24, 0x00 },
0039         { 0x28, 0x00 },
0040         { 0x24, 0x01 },
0041         { 0x1f, 0x00 },
0042         { 0x0f, 0x00 },
0043         { 0x17, 0x00 },
0044         { 0x06, 0x00 },
0045         { 0x00, 0x00 }
0046     };
0047     struct nvkm_subdev *subdev = &init->subdev;
0048     struct nvkm_device *device = subdev->device;
0049     struct nvkm_bios *bios = device->bios;
0050     struct io_mapping *fb;
0051     u32 patt = 0xdeadbeef;
0052     u16 data;
0053     u8 strap, ramcfg[2];
0054     int i, v;
0055
0056     /* Map the framebuffer aperture */
0057     fb = fbmem_init(device);
0058     if (!fb) {
0059         nvkm_error(subdev, "failed to map fb\n");
0060         return;
0061     }
0062
0063     strap = (nvkm_rd32(device, 0x101000) & 0x0000003c) >> 2;
0064     if ((data = bmp_mem_init_table(bios))) {
0065         ramcfg[0] = nvbios_rd08(bios, data + 2 * strap + 0);
0066         ramcfg[1] = nvbios_rd08(bios, data + 2 * strap + 1);
0067     } else {
0068         ramcfg[0] = default_config_tab[strap][0];
0069         ramcfg[1] = default_config_tab[strap][1];
0070     }
0071
0072     /* Sequencer off */
0073     nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) | 0x20);
0074
0075     if (nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_UMA_ENABLE)
0076         goto out;
0077
0078     nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);
0079
0080     /* If present load the hardcoded scrambling table */
0081     if (data) {
0082         for (i = 0, data += 0x10; i < 8; i++, data += 4) {
0083             u32 scramble = nvbios_rd32(bios, data);
0084             nvkm_wr32(device, NV04_PFB_SCRAMBLE(i), scramble);
0085         }
0086     }
0087
0088     /* Set memory type/width/length defaults depending on the straps */
0089     nvkm_mask(device, NV04_PFB_BOOT_0, 0x3f, ramcfg[0]);
0090
0091     if (ramcfg[1] & 0x80)
0092         nvkm_mask(device, NV04_PFB_CFG0, 0, NV04_PFB_CFG0_SCRAMBLE);
0093
0094     nvkm_mask(device, NV04_PFB_CFG1, 0x700001, (ramcfg[1] & 1) << 20);
0095     nvkm_mask(device, NV04_PFB_CFG1, 0, 1);
0096
0097     /* Probe memory bus width */
0098     for (i = 0; i < 4; i++)
0099         fbmem_poke(fb, 4 * i, patt);
0100
0101     if (fbmem_peek(fb, 0xc) != patt)
0102         nvkm_mask(device, NV04_PFB_BOOT_0,
0103               NV04_PFB_BOOT_0_RAM_WIDTH_128, 0);
0104
0105     /* Probe memory length */
0106     v = nvkm_rd32(device, NV04_PFB_BOOT_0) & NV04_PFB_BOOT_0_RAM_AMOUNT;
0107
0108     if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_32MB &&
0109         (!fbmem_readback(fb, 0x1000000, ++patt) ||
0110          !fbmem_readback(fb, 0, ++patt)))
0111         nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
0112               NV04_PFB_BOOT_0_RAM_AMOUNT_16MB);
0113
0114     if (v == NV04_PFB_BOOT_0_RAM_AMOUNT_16MB &&
0115         !fbmem_readback(fb, 0x800000, ++patt))
0116         nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
0117               NV04_PFB_BOOT_0_RAM_AMOUNT_8MB);
0118
0119     if (!fbmem_readback(fb, 0x400000, ++patt))
0120         nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,
0121               NV04_PFB_BOOT_0_RAM_AMOUNT_4MB);
0122
0123 out:
0124     /* Sequencer on */
0125     nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) & ~0x20);
0126     fbmem_fini(fb);
0127 }
0128
0129 static const struct nvkm_devinit_func
0130 nv05_devinit = {
0131     .dtor = nv04_devinit_dtor,
0132     .preinit = nv04_devinit_preinit,
0133     .post = nv04_devinit_post,
0134     .meminit = nv05_devinit_meminit,
0135     .pll_set = nv04_devinit_pll_set,
0136 };
0137
0138 int
0139 nv05_devinit_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
0140          struct nvkm_devinit **pinit)
0141 {
0142     return nv04_devinit_new_(&nv05_devinit, device, type, inst, pinit);
0143 }