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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: MIT */
0002 #ifndef __NVKM_CLK_SEQ_H__
0003 #define __NVKM_CLK_SEQ_H__
0004 #include <subdev/bus/hwsq.h>
0005 
0006 #define clk_init(s,p)       hwsq_init(&(s)->base, (p))
0007 #define clk_exec(s,e)       hwsq_exec(&(s)->base, (e))
0008 #define clk_have(s,r)       ((s)->r_##r.addr != 0x000000)
0009 #define clk_rd32(s,r)       hwsq_rd32(&(s)->base, &(s)->r_##r)
0010 #define clk_wr32(s,r,d)     hwsq_wr32(&(s)->base, &(s)->r_##r, (d))
0011 #define clk_mask(s,r,m,d)   hwsq_mask(&(s)->base, &(s)->r_##r, (m), (d))
0012 #define clk_setf(s,f,d)     hwsq_setf(&(s)->base, (f), (d))
0013 #define clk_wait(s,f,d)     hwsq_wait(&(s)->base, (f), (d))
0014 #define clk_nsec(s,n)       hwsq_nsec(&(s)->base, (n))
0015 #endif