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0024 #include <subdev/bios.h>
0025 #include <subdev/bios/dcb.h>
0026 #include <subdev/bios/i2c.h>
0027
0028 u16
0029 dcb_i2c_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
0030 {
0031 u16 i2c = 0x0000;
0032 u16 dcb = dcb_table(bios, ver, hdr, cnt, len);
0033 if (dcb) {
0034 if (*ver >= 0x15)
0035 i2c = nvbios_rd16(bios, dcb + 2);
0036 if (*ver >= 0x30)
0037 i2c = nvbios_rd16(bios, dcb + 4);
0038 }
0039
0040 if (i2c && *ver >= 0x42) {
0041 nvkm_warn(&bios->subdev, "ccb %02x not supported\n", *ver);
0042 return 0x0000;
0043 }
0044
0045 if (i2c && *ver >= 0x30) {
0046 *ver = nvbios_rd08(bios, i2c + 0);
0047 *hdr = nvbios_rd08(bios, i2c + 1);
0048 *cnt = nvbios_rd08(bios, i2c + 2);
0049 *len = nvbios_rd08(bios, i2c + 3);
0050 } else {
0051 *ver = *ver;
0052 *hdr = 0;
0053 *cnt = 16;
0054 *len = 4;
0055 }
0056
0057 return i2c;
0058 }
0059
0060 u16
0061 dcb_i2c_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len)
0062 {
0063 u8 hdr, cnt;
0064 u16 i2c = dcb_i2c_table(bios, ver, &hdr, &cnt, len);
0065 if (i2c && idx < cnt)
0066 return i2c + hdr + (idx * *len);
0067 return 0x0000;
0068 }
0069
0070 int
0071 dcb_i2c_parse(struct nvkm_bios *bios, u8 idx, struct dcb_i2c_entry *info)
0072 {
0073 struct nvkm_subdev *subdev = &bios->subdev;
0074 u8 ver, len;
0075 u16 ent = dcb_i2c_entry(bios, idx, &ver, &len);
0076 if (ent) {
0077 if (ver >= 0x41) {
0078 u32 ent_value = nvbios_rd32(bios, ent);
0079 u8 i2c_port = (ent_value >> 0) & 0x1f;
0080 u8 dpaux_port = (ent_value >> 5) & 0x1f;
0081
0082 if (i2c_port == 0x1f && dpaux_port == 0x1f)
0083 info->type = DCB_I2C_UNUSED;
0084 else
0085 info->type = DCB_I2C_PMGR;
0086 } else
0087 if (ver >= 0x30) {
0088 info->type = nvbios_rd08(bios, ent + 0x03);
0089 } else {
0090 info->type = nvbios_rd08(bios, ent + 0x03) & 0x07;
0091 if (info->type == 0x07)
0092 info->type = DCB_I2C_UNUSED;
0093 }
0094
0095 info->drive = DCB_I2C_UNUSED;
0096 info->sense = DCB_I2C_UNUSED;
0097 info->share = DCB_I2C_UNUSED;
0098 info->auxch = DCB_I2C_UNUSED;
0099
0100 switch (info->type) {
0101 case DCB_I2C_NV04_BIT:
0102 info->drive = nvbios_rd08(bios, ent + 0);
0103 info->sense = nvbios_rd08(bios, ent + 1);
0104 return 0;
0105 case DCB_I2C_NV4E_BIT:
0106 info->drive = nvbios_rd08(bios, ent + 1);
0107 return 0;
0108 case DCB_I2C_NVIO_BIT:
0109 info->drive = nvbios_rd08(bios, ent + 0) & 0x0f;
0110 if (nvbios_rd08(bios, ent + 1) & 0x01)
0111 info->share = nvbios_rd08(bios, ent + 1) >> 1;
0112 return 0;
0113 case DCB_I2C_NVIO_AUX:
0114 info->auxch = nvbios_rd08(bios, ent + 0) & 0x0f;
0115 if (nvbios_rd08(bios, ent + 1) & 0x01)
0116 info->share = info->auxch;
0117 return 0;
0118 case DCB_I2C_PMGR:
0119 info->drive = (nvbios_rd16(bios, ent + 0) & 0x01f) >> 0;
0120 if (info->drive == 0x1f)
0121 info->drive = DCB_I2C_UNUSED;
0122 info->auxch = (nvbios_rd16(bios, ent + 0) & 0x3e0) >> 5;
0123 if (info->auxch == 0x1f)
0124 info->auxch = DCB_I2C_UNUSED;
0125 info->share = info->auxch;
0126 return 0;
0127 case DCB_I2C_UNUSED:
0128 return 0;
0129 default:
0130 nvkm_warn(subdev, "unknown i2c type %d\n", info->type);
0131 info->type = DCB_I2C_UNUSED;
0132 return 0;
0133 }
0134 }
0135
0136 if (bios->bmp_offset && idx < 2) {
0137
0138
0139
0140 if (nvbios_rd08(bios, bios->bmp_offset + 5) < 4)
0141 ent = 0x0048;
0142 else
0143 ent = 0x0036 + bios->bmp_offset;
0144
0145 if (idx == 0) {
0146 info->drive = nvbios_rd08(bios, ent + 4);
0147 if (!info->drive) info->drive = 0x3f;
0148 info->sense = nvbios_rd08(bios, ent + 5);
0149 if (!info->sense) info->sense = 0x3e;
0150 } else
0151 if (idx == 1) {
0152 info->drive = nvbios_rd08(bios, ent + 6);
0153 if (!info->drive) info->drive = 0x37;
0154 info->sense = nvbios_rd08(bios, ent + 7);
0155 if (!info->sense) info->sense = 0x36;
0156 }
0157
0158 info->type = DCB_I2C_NV04_BIT;
0159 info->share = DCB_I2C_UNUSED;
0160 return 0;
0161 }
0162
0163 return -ENOENT;
0164 }