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0001 /*
0002  * Copyright (C) 2007 Ben Skeggs.
0003  * All Rights Reserved.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining
0006  * a copy of this software and associated documentation files (the
0007  * "Software"), to deal in the Software without restriction, including
0008  * without limitation the rights to use, copy, modify, merge, publish,
0009  * distribute, sublicense, and/or sell copies of the Software, and to
0010  * permit persons to whom the Software is furnished to do so, subject to
0011  * the following conditions:
0012  *
0013  * The above copyright notice and this permission notice (including the
0014  * next paragraph) shall be included in all copies or substantial
0015  * portions of the Software.
0016  *
0017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0018  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0019  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
0020  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
0021  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
0022  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
0023  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0024  *
0025  */
0026 
0027 #ifndef __NOUVEAU_DMA_H__
0028 #define __NOUVEAU_DMA_H__
0029 
0030 #include "nouveau_bo.h"
0031 #include "nouveau_chan.h"
0032 
0033 int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
0034 void nv50_dma_push(struct nouveau_channel *, u64 addr, int length);
0035 
0036 /*
0037  * There's a hw race condition where you can't jump to your PUT offset,
0038  * to avoid this we jump to offset + SKIPS and fill the difference with
0039  * NOPs.
0040  *
0041  * xf86-video-nv configures the DMA fetch size to 32 bytes, and uses
0042  * a SKIPS value of 8.  Lets assume that the race condition is to do
0043  * with writing into the fetch area, we configure a fetch size of 128
0044  * bytes so we need a larger SKIPS value.
0045  */
0046 #define NOUVEAU_DMA_SKIPS (128 / 4)
0047 
0048 /* Object handles - for stuff that's doesn't use handle == oclass. */
0049 enum {
0050     NvDmaFB     = 0x80000002,
0051     NvDmaTT     = 0x80000003,
0052     NvNotify0       = 0x80000006,
0053     NvSema      = 0x8000000f,
0054     NvEvoSema0  = 0x80000010,
0055     NvEvoSema1  = 0x80000011,
0056 };
0057 
0058 static __must_check inline int
0059 RING_SPACE(struct nouveau_channel *chan, int size)
0060 {
0061     int ret;
0062 
0063     ret = nouveau_dma_wait(chan, 1, size);
0064     if (ret)
0065         return ret;
0066 
0067     chan->dma.free -= size;
0068     return 0;
0069 }
0070 
0071 static inline void
0072 OUT_RING(struct nouveau_channel *chan, int data)
0073 {
0074     nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data);
0075 }
0076 
0077 #define WRITE_PUT(val) do {                                                    \
0078     mb();                                                   \
0079     nouveau_bo_rd32(chan->push.buffer, 0);                                 \
0080     nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\
0081 } while (0)
0082 
0083 static inline void
0084 FIRE_RING(struct nouveau_channel *chan)
0085 {
0086     if (chan->dma.cur == chan->dma.put)
0087         return;
0088     chan->accel_done = true;
0089 
0090     if (chan->dma.ib_max) {
0091         nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2),
0092                   (chan->dma.cur - chan->dma.put) << 2);
0093     } else {
0094         WRITE_PUT(chan->dma.cur);
0095     }
0096 
0097     chan->dma.put = chan->dma.cur;
0098 }
0099 
0100 static inline void
0101 WIND_RING(struct nouveau_channel *chan)
0102 {
0103     chan->dma.cur = chan->dma.put;
0104 }
0105 
0106 /* NV_SW object class */
0107 #define NV_SW_DMA_VBLSEM                                             0x0000018c
0108 #define NV_SW_VBLSEM_OFFSET                                          0x00000400
0109 #define NV_SW_VBLSEM_RELEASE_VALUE                                   0x00000404
0110 #define NV_SW_VBLSEM_RELEASE                                         0x00000408
0111 #define NV_SW_PAGE_FLIP                                              0x00000500
0112 
0113 #endif