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0001 /*
0002  * Copyright 2005-2006 Erik Waling
0003  * Copyright 2006 Stephane Marchesin
0004  * Copyright 2007-2009 Stuart Bennett
0005  *
0006  * Permission is hereby granted, free of charge, to any person obtaining a
0007  * copy of this software and associated documentation files (the "Software"),
0008  * to deal in the Software without restriction, including without limitation
0009  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0010  * and/or sell copies of the Software, and to permit persons to whom the
0011  * Software is furnished to do so, subject to the following conditions:
0012  *
0013  * The above copyright notice and this permission notice shall be included in
0014  * all copies or substantial portions of the Software.
0015  *
0016  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0017  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0018  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0019  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0020  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
0021  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0022  * SOFTWARE.
0023  */
0024 
0025 #include "nouveau_drv.h"
0026 #include "nouveau_reg.h"
0027 #include "dispnv04/hw.h"
0028 #include "nouveau_encoder.h"
0029 
0030 #include <linux/io-mapping.h>
0031 #include <linux/firmware.h>
0032 
0033 /* these defines are made up */
0034 #define NV_CIO_CRE_44_HEADA 0x0
0035 #define NV_CIO_CRE_44_HEADB 0x3
0036 #define FEATURE_MOBILE 0x10 /* also FEATURE_QUADRO for BMP */
0037 
0038 #define EDID1_LEN 128
0039 
0040 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
0041 #define LOG_OLD_VALUE(x)
0042 
0043 struct init_exec {
0044     bool execute;
0045     bool repeat;
0046 };
0047 
0048 static bool nv_cksum(const uint8_t *data, unsigned int length)
0049 {
0050     /*
0051      * There's a few checksums in the BIOS, so here's a generic checking
0052      * function.
0053      */
0054     int i;
0055     uint8_t sum = 0;
0056 
0057     for (i = 0; i < length; i++)
0058         sum += data[i];
0059 
0060     if (sum)
0061         return true;
0062 
0063     return false;
0064 }
0065 
0066 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
0067 {
0068     int compare_record_len, i = 0;
0069     uint16_t compareclk, scriptptr = 0;
0070 
0071     if (bios->major_version < 5) /* pre BIT */
0072         compare_record_len = 3;
0073     else
0074         compare_record_len = 4;
0075 
0076     do {
0077         compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
0078         if (pxclk >= compareclk * 10) {
0079             if (bios->major_version < 5) {
0080                 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
0081                 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
0082             } else
0083                 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
0084             break;
0085         }
0086         i++;
0087     } while (compareclk);
0088 
0089     return scriptptr;
0090 }
0091 
0092 static void
0093 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
0094               struct dcb_output *dcbent, int head, bool dl)
0095 {
0096     struct nouveau_drm *drm = nouveau_drm(dev);
0097 
0098     NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
0099          scriptptr);
0100     NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :
0101                              NV_CIO_CRE_44_HEADA);
0102     nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);
0103 
0104     nv04_dfp_bind_head(dev, dcbent, head, dl);
0105 }
0106 
0107 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
0108 {
0109     struct nouveau_drm *drm = nouveau_drm(dev);
0110     struct nvbios *bios = &drm->vbios;
0111     uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
0112     uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
0113 #ifdef __powerpc__
0114     struct pci_dev *pdev = to_pci_dev(dev->dev);
0115 #endif
0116 
0117     if (!bios->fp.xlated_entry || !sub || !scriptofs)
0118         return -EINVAL;
0119 
0120     run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
0121 
0122     if (script == LVDS_PANEL_OFF) {
0123         /* off-on delay in ms */
0124         mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
0125     }
0126 #ifdef __powerpc__
0127     /* Powerbook specific quirks */
0128     if (script == LVDS_RESET &&
0129         (pdev->device == 0x0179 || pdev->device == 0x0189 ||
0130          pdev->device == 0x0329))
0131         nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
0132 #endif
0133 
0134     return 0;
0135 }
0136 
0137 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
0138 {
0139     /*
0140      * The BIT LVDS table's header has the information to setup the
0141      * necessary registers. Following the standard 4 byte header are:
0142      * A bitmask byte and a dual-link transition pxclk value for use in
0143      * selecting the init script when not using straps; 4 script pointers
0144      * for panel power, selected by output and on/off; and 8 table pointers
0145      * for panel init, the needed one determined by output, and bits in the
0146      * conf byte. These tables are similar to the TMDS tables, consisting
0147      * of a list of pxclks and script pointers.
0148      */
0149     struct nouveau_drm *drm = nouveau_drm(dev);
0150     struct nvbios *bios = &drm->vbios;
0151     unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
0152     uint16_t scriptptr = 0, clktable;
0153 
0154     /*
0155      * For now we assume version 3.0 table - g80 support will need some
0156      * changes
0157      */
0158 
0159     switch (script) {
0160     case LVDS_INIT:
0161         return -ENOSYS;
0162     case LVDS_BACKLIGHT_ON:
0163     case LVDS_PANEL_ON:
0164         scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
0165         break;
0166     case LVDS_BACKLIGHT_OFF:
0167     case LVDS_PANEL_OFF:
0168         scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
0169         break;
0170     case LVDS_RESET:
0171         clktable = bios->fp.lvdsmanufacturerpointer + 15;
0172         if (dcbent->or == 4)
0173             clktable += 8;
0174 
0175         if (dcbent->lvdsconf.use_straps_for_mode) {
0176             if (bios->fp.dual_link)
0177                 clktable += 4;
0178             if (bios->fp.if_is_24bit)
0179                 clktable += 2;
0180         } else {
0181             /* using EDID */
0182             int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
0183 
0184             if (bios->fp.dual_link) {
0185                 clktable += 4;
0186                 cmpval_24bit <<= 1;
0187             }
0188 
0189             if (bios->fp.strapless_is_24bit & cmpval_24bit)
0190                 clktable += 2;
0191         }
0192 
0193         clktable = ROM16(bios->data[clktable]);
0194         if (!clktable) {
0195             NV_ERROR(drm, "Pixel clock comparison table not found\n");
0196             return -ENOENT;
0197         }
0198         scriptptr = clkcmptable(bios, clktable, pxclk);
0199     }
0200 
0201     if (!scriptptr) {
0202         NV_ERROR(drm, "LVDS output init script not found\n");
0203         return -ENOENT;
0204     }
0205     run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
0206 
0207     return 0;
0208 }
0209 
0210 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
0211 {
0212     /*
0213      * LVDS operations are multiplexed in an effort to present a single API
0214      * which works with two vastly differing underlying structures.
0215      * This acts as the demux
0216      */
0217 
0218     struct nouveau_drm *drm = nouveau_drm(dev);
0219     struct nvif_object *device = &drm->client.device.object;
0220     struct nvbios *bios = &drm->vbios;
0221     uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
0222     uint32_t sel_clk_binding, sel_clk;
0223     int ret;
0224 
0225     if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
0226         (lvds_ver >= 0x30 && script == LVDS_INIT))
0227         return 0;
0228 
0229     if (!bios->fp.lvds_init_run) {
0230         bios->fp.lvds_init_run = true;
0231         call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
0232     }
0233 
0234     if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
0235         call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
0236     if (script == LVDS_RESET && bios->fp.power_off_for_reset)
0237         call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
0238 
0239     NV_INFO(drm, "Calling LVDS script %d:\n", script);
0240 
0241     /* don't let script change pll->head binding */
0242     sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
0243 
0244     if (lvds_ver < 0x30)
0245         ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
0246     else
0247         ret = run_lvds_table(dev, dcbent, head, script, pxclk);
0248 
0249     bios->fp.last_script_invoc = (script << 1 | head);
0250 
0251     sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
0252     NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
0253     /* some scripts set a value in NV_PBUS_POWERCTRL_2 and break video overlay */
0254     nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
0255 
0256     return ret;
0257 }
0258 
0259 struct lvdstableheader {
0260     uint8_t lvds_ver, headerlen, recordlen;
0261 };
0262 
0263 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
0264 {
0265     /*
0266      * BMP version (0xa) LVDS table has a simple header of version and
0267      * record length. The BIT LVDS table has the typical BIT table header:
0268      * version byte, header length byte, record length byte, and a byte for
0269      * the maximum number of records that can be held in the table.
0270      */
0271 
0272     struct nouveau_drm *drm = nouveau_drm(dev);
0273     uint8_t lvds_ver, headerlen, recordlen;
0274 
0275     memset(lth, 0, sizeof(struct lvdstableheader));
0276 
0277     if (bios->fp.lvdsmanufacturerpointer == 0x0) {
0278         NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
0279         return -EINVAL;
0280     }
0281 
0282     lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
0283 
0284     switch (lvds_ver) {
0285     case 0x0a:  /* pre NV40 */
0286         headerlen = 2;
0287         recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
0288         break;
0289     case 0x30:  /* NV4x */
0290         headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
0291         if (headerlen < 0x1f) {
0292             NV_ERROR(drm, "LVDS table header not understood\n");
0293             return -EINVAL;
0294         }
0295         recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
0296         break;
0297     case 0x40:  /* G80/G90 */
0298         headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
0299         if (headerlen < 0x7) {
0300             NV_ERROR(drm, "LVDS table header not understood\n");
0301             return -EINVAL;
0302         }
0303         recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
0304         break;
0305     default:
0306         NV_ERROR(drm,
0307              "LVDS table revision %d.%d not currently supported\n",
0308              lvds_ver >> 4, lvds_ver & 0xf);
0309         return -ENOSYS;
0310     }
0311 
0312     lth->lvds_ver = lvds_ver;
0313     lth->headerlen = headerlen;
0314     lth->recordlen = recordlen;
0315 
0316     return 0;
0317 }
0318 
0319 static int
0320 get_fp_strap(struct drm_device *dev, struct nvbios *bios)
0321 {
0322     struct nouveau_drm *drm = nouveau_drm(dev);
0323     struct nvif_object *device = &drm->client.device.object;
0324 
0325     /*
0326      * The fp strap is normally dictated by the "User Strap" in
0327      * PEXTDEV_BOOT_0[20:16], but on BMP cards when bit 2 of the
0328      * Internal_Flags struct at 0x48 is set, the user strap gets overriden
0329      * by the PCI subsystem ID during POST, but not before the previous user
0330      * strap has been committed to CR58 for CR57=0xf on head A, which may be
0331      * read and used instead
0332      */
0333 
0334     if (bios->major_version < 5 && bios->data[0x48] & 0x4)
0335         return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
0336 
0337     if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL)
0338         return nvif_rd32(device, 0x001800) & 0x0000000f;
0339     else
0340     if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
0341         return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
0342     else
0343         return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
0344 }
0345 
0346 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
0347 {
0348     struct nouveau_drm *drm = nouveau_drm(dev);
0349     uint8_t *fptable;
0350     uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
0351     int ret, ofs, fpstrapping;
0352     struct lvdstableheader lth;
0353 
0354     if (bios->fp.fptablepointer == 0x0) {
0355         /* Most laptop cards lack an fp table. They use DDC. */
0356         NV_DEBUG(drm, "Pointer to flat panel table invalid\n");
0357         bios->digital_min_front_porch = 0x4b;
0358         return 0;
0359     }
0360 
0361     fptable = &bios->data[bios->fp.fptablepointer];
0362     fptable_ver = fptable[0];
0363 
0364     switch (fptable_ver) {
0365     /*
0366      * BMP version 0x5.0x11 BIOSen have version 1 like tables, but no
0367      * version field, and miss one of the spread spectrum/PWM bytes.
0368      * This could affect early GF2Go parts (not seen any appropriate ROMs
0369      * though). Here we assume that a version of 0x05 matches this case
0370      * (combining with a BMP version check would be better), as the
0371      * common case for the panel type field is 0x0005, and that is in
0372      * fact what we are reading the first byte of.
0373      */
0374     case 0x05:  /* some NV10, 11, 15, 16 */
0375         recordlen = 42;
0376         ofs = -1;
0377         break;
0378     case 0x10:  /* some NV15/16, and NV11+ */
0379         recordlen = 44;
0380         ofs = 0;
0381         break;
0382     case 0x20:  /* NV40+ */
0383         headerlen = fptable[1];
0384         recordlen = fptable[2];
0385         fpentries = fptable[3];
0386         /*
0387          * fptable[4] is the minimum
0388          * RAMDAC_FP_HCRTC -> RAMDAC_FP_HSYNC_START gap
0389          */
0390         bios->digital_min_front_porch = fptable[4];
0391         ofs = -7;
0392         break;
0393     default:
0394         NV_ERROR(drm,
0395              "FP table revision %d.%d not currently supported\n",
0396              fptable_ver >> 4, fptable_ver & 0xf);
0397         return -ENOSYS;
0398     }
0399 
0400     if (!bios->is_mobile) /* !mobile only needs digital_min_front_porch */
0401         return 0;
0402 
0403     ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
0404     if (ret)
0405         return ret;
0406 
0407     if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
0408         bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
0409                             lth.headerlen + 1;
0410         bios->fp.xlatwidth = lth.recordlen;
0411     }
0412     if (bios->fp.fpxlatetableptr == 0x0) {
0413         NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
0414         return -EINVAL;
0415     }
0416 
0417     fpstrapping = get_fp_strap(dev, bios);
0418 
0419     fpindex = bios->data[bios->fp.fpxlatetableptr +
0420                     fpstrapping * bios->fp.xlatwidth];
0421 
0422     if (fpindex > fpentries) {
0423         NV_ERROR(drm, "Bad flat panel table index\n");
0424         return -ENOENT;
0425     }
0426 
0427     /* nv4x cards need both a strap value and fpindex of 0xf to use DDC */
0428     if (lth.lvds_ver > 0x10)
0429         bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
0430 
0431     /*
0432      * If either the strap or xlated fpindex value are 0xf there is no
0433      * panel using a strap-derived bios mode present.  this condition
0434      * includes, but is different from, the DDC panel indicator above
0435      */
0436     if (fpstrapping == 0xf || fpindex == 0xf)
0437         return 0;
0438 
0439     bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
0440                 recordlen * fpindex + ofs;
0441 
0442     NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
0443          ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
0444          ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
0445          ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
0446 
0447     return 0;
0448 }
0449 
0450 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
0451 {
0452     struct nouveau_drm *drm = nouveau_drm(dev);
0453     struct nvbios *bios = &drm->vbios;
0454     uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
0455 
0456     if (!mode)  /* just checking whether we can produce a mode */
0457         return bios->fp.mode_ptr;
0458 
0459     memset(mode, 0, sizeof(struct drm_display_mode));
0460     /*
0461      * For version 1.0 (version in byte 0):
0462      * bytes 1-2 are "panel type", including bits on whether Colour/mono,
0463      * single/dual link, and type (TFT etc.)
0464      * bytes 3-6 are bits per colour in RGBX
0465      */
0466     mode->clock = ROM16(mode_entry[7]) * 10;
0467     /* bytes 9-10 is HActive */
0468     mode->hdisplay = ROM16(mode_entry[11]) + 1;
0469     /*
0470      * bytes 13-14 is HValid Start
0471      * bytes 15-16 is HValid End
0472      */
0473     mode->hsync_start = ROM16(mode_entry[17]) + 1;
0474     mode->hsync_end = ROM16(mode_entry[19]) + 1;
0475     mode->htotal = ROM16(mode_entry[21]) + 1;
0476     /* bytes 23-24, 27-30 similarly, but vertical */
0477     mode->vdisplay = ROM16(mode_entry[25]) + 1;
0478     mode->vsync_start = ROM16(mode_entry[31]) + 1;
0479     mode->vsync_end = ROM16(mode_entry[33]) + 1;
0480     mode->vtotal = ROM16(mode_entry[35]) + 1;
0481     mode->flags |= (mode_entry[37] & 0x10) ?
0482             DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
0483     mode->flags |= (mode_entry[37] & 0x1) ?
0484             DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
0485     /*
0486      * bytes 38-39 relate to spread spectrum settings
0487      * bytes 40-43 are something to do with PWM
0488      */
0489 
0490     mode->status = MODE_OK;
0491     mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
0492     drm_mode_set_name(mode);
0493     return bios->fp.mode_ptr;
0494 }
0495 
0496 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
0497 {
0498     /*
0499      * The LVDS table header is (mostly) described in
0500      * parse_lvds_manufacturer_table_header(): the BIT header additionally
0501      * contains the dual-link transition pxclk (in 10s kHz), at byte 5 - if
0502      * straps are not being used for the panel, this specifies the frequency
0503      * at which modes should be set up in the dual link style.
0504      *
0505      * Following the header, the BMP (ver 0xa) table has several records,
0506      * indexed by a separate xlat table, indexed in turn by the fp strap in
0507      * EXTDEV_BOOT. Each record had a config byte, followed by 6 script
0508      * numbers for use by INIT_SUB which controlled panel init and power,
0509      * and finally a dword of ms to sleep between power off and on
0510      * operations.
0511      *
0512      * In the BIT versions, the table following the header serves as an
0513      * integrated config and xlat table: the records in the table are
0514      * indexed by the FP strap nibble in EXTDEV_BOOT, and each record has
0515      * two bytes - the first as a config byte, the second for indexing the
0516      * fp mode table pointed to by the BIT 'D' table
0517      *
0518      * DDC is not used until after card init, so selecting the correct table
0519      * entry and setting the dual link flag for EDID equipped panels,
0520      * requiring tests against the native-mode pixel clock, cannot be done
0521      * until later, when this function should be called with non-zero pxclk
0522      */
0523     struct nouveau_drm *drm = nouveau_drm(dev);
0524     struct nvbios *bios = &drm->vbios;
0525     int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
0526     struct lvdstableheader lth;
0527     uint16_t lvdsofs;
0528     int ret, chip_version = bios->chip_version;
0529 
0530     ret = parse_lvds_manufacturer_table_header(dev, bios, &lth);
0531     if (ret)
0532         return ret;
0533 
0534     switch (lth.lvds_ver) {
0535     case 0x0a:  /* pre NV40 */
0536         lvdsmanufacturerindex = bios->data[
0537                     bios->fp.fpxlatemanufacturertableptr +
0538                     fpstrapping];
0539 
0540         /* we're done if this isn't the EDID panel case */
0541         if (!pxclk)
0542             break;
0543 
0544         if (chip_version < 0x25) {
0545             /* nv17 behaviour
0546              *
0547              * It seems the old style lvds script pointer is reused
0548              * to select 18/24 bit colour depth for EDID panels.
0549              */
0550             lvdsmanufacturerindex =
0551                 (bios->legacy.lvds_single_a_script_ptr & 1) ?
0552                                     2 : 0;
0553             if (pxclk >= bios->fp.duallink_transition_clk)
0554                 lvdsmanufacturerindex++;
0555         } else if (chip_version < 0x30) {
0556             /* nv28 behaviour (off-chip encoder)
0557              *
0558              * nv28 does a complex dance of first using byte 121 of
0559              * the EDID to choose the lvdsmanufacturerindex, then
0560              * later attempting to match the EDID manufacturer and
0561              * product IDs in a table (signature 'pidt' (panel id
0562              * table?)), setting an lvdsmanufacturerindex of 0 and
0563              * an fp strap of the match index (or 0xf if none)
0564              */
0565             lvdsmanufacturerindex = 0;
0566         } else {
0567             /* nv31, nv34 behaviour */
0568             lvdsmanufacturerindex = 0;
0569             if (pxclk >= bios->fp.duallink_transition_clk)
0570                 lvdsmanufacturerindex = 2;
0571             if (pxclk >= 140000)
0572                 lvdsmanufacturerindex = 3;
0573         }
0574 
0575         /*
0576          * nvidia set the high nibble of (cr57=f, cr58) to
0577          * lvdsmanufacturerindex in this case; we don't
0578          */
0579         break;
0580     case 0x30:  /* NV4x */
0581     case 0x40:  /* G80/G90 */
0582         lvdsmanufacturerindex = fpstrapping;
0583         break;
0584     default:
0585         NV_ERROR(drm, "LVDS table revision not currently supported\n");
0586         return -ENOSYS;
0587     }
0588 
0589     lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
0590     switch (lth.lvds_ver) {
0591     case 0x0a:
0592         bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
0593         bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
0594         bios->fp.dual_link = bios->data[lvdsofs] & 4;
0595         bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
0596         *if_is_24bit = bios->data[lvdsofs] & 16;
0597         break;
0598     case 0x30:
0599     case 0x40:
0600         /*
0601          * No sign of the "power off for reset" or "reset for panel
0602          * on" bits, but it's safer to assume we should
0603          */
0604         bios->fp.power_off_for_reset = true;
0605         bios->fp.reset_after_pclk_change = true;
0606 
0607         /*
0608          * It's ok lvdsofs is wrong for nv4x edid case; dual_link is
0609          * over-written, and if_is_24bit isn't used
0610          */
0611         bios->fp.dual_link = bios->data[lvdsofs] & 1;
0612         bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
0613         bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
0614         bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
0615         break;
0616     }
0617 
0618     /* set dual_link flag for EDID case */
0619     if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
0620         bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
0621 
0622     *dl = bios->fp.dual_link;
0623 
0624     return 0;
0625 }
0626 
0627 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
0628 {
0629     /*
0630      * the pxclk parameter is in kHz
0631      *
0632      * This runs the TMDS regs setting code found on BIT bios cards
0633      *
0634      * For ffs(or) == 1 use the first table, for ffs(or) == 2 and
0635      * ffs(or) == 3, use the second.
0636      */
0637 
0638     struct nouveau_drm *drm = nouveau_drm(dev);
0639     struct nvif_object *device = &drm->client.device.object;
0640     struct nvbios *bios = &drm->vbios;
0641     int cv = bios->chip_version;
0642     uint16_t clktable = 0, scriptptr;
0643     uint32_t sel_clk_binding, sel_clk;
0644 
0645     /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */
0646     if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
0647         dcbent->location != DCB_LOC_ON_CHIP)
0648         return 0;
0649 
0650     switch (ffs(dcbent->or)) {
0651     case 1:
0652         clktable = bios->tmds.output0_script_ptr;
0653         break;
0654     case 2:
0655     case 3:
0656         clktable = bios->tmds.output1_script_ptr;
0657         break;
0658     }
0659 
0660     if (!clktable) {
0661         NV_ERROR(drm, "Pixel clock comparison table not found\n");
0662         return -EINVAL;
0663     }
0664 
0665     scriptptr = clkcmptable(bios, clktable, pxclk);
0666 
0667     if (!scriptptr) {
0668         NV_ERROR(drm, "TMDS output init script not found\n");
0669         return -ENOENT;
0670     }
0671 
0672     /* don't let script change pll->head binding */
0673     sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
0674     run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
0675     sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
0676     NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
0677 
0678     return 0;
0679 }
0680 
0681 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
0682 {
0683     /*
0684      * Parses the init table segment for pointers used in script execution.
0685      *
0686      * offset + 0  (16 bits): init script tables pointer
0687      * offset + 2  (16 bits): macro index table pointer
0688      * offset + 4  (16 bits): macro table pointer
0689      * offset + 6  (16 bits): condition table pointer
0690      * offset + 8  (16 bits): io condition table pointer
0691      * offset + 10 (16 bits): io flag condition table pointer
0692      * offset + 12 (16 bits): init function table pointer
0693      */
0694 
0695     bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
0696 }
0697 
0698 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
0699 {
0700     /*
0701      * Parses the load detect values for g80 cards.
0702      *
0703      * offset + 0 (16 bits): loadval table pointer
0704      */
0705 
0706     struct nouveau_drm *drm = nouveau_drm(dev);
0707     uint16_t load_table_ptr;
0708     uint8_t version, headerlen, entrylen, num_entries;
0709 
0710     if (bitentry->length != 3) {
0711         NV_ERROR(drm, "Do not understand BIT A table\n");
0712         return -EINVAL;
0713     }
0714 
0715     load_table_ptr = ROM16(bios->data[bitentry->offset]);
0716 
0717     if (load_table_ptr == 0x0) {
0718         NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
0719         return -EINVAL;
0720     }
0721 
0722     version = bios->data[load_table_ptr];
0723 
0724     if (version != 0x10) {
0725         NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
0726              version >> 4, version & 0xF);
0727         return -ENOSYS;
0728     }
0729 
0730     headerlen = bios->data[load_table_ptr + 1];
0731     entrylen = bios->data[load_table_ptr + 2];
0732     num_entries = bios->data[load_table_ptr + 3];
0733 
0734     if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
0735         NV_ERROR(drm, "Do not understand BIT loadval table\n");
0736         return -EINVAL;
0737     }
0738 
0739     /* First entry is normal dac, 2nd tv-out perhaps? */
0740     bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
0741 
0742     return 0;
0743 }
0744 
0745 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
0746 {
0747     /*
0748      * Parses the flat panel table segment that the bit entry points to.
0749      * Starting at bitentry->offset:
0750      *
0751      * offset + 0  (16 bits): ??? table pointer - seems to have 18 byte
0752      * records beginning with a freq.
0753      * offset + 2  (16 bits): mode table pointer
0754      */
0755     struct nouveau_drm *drm = nouveau_drm(dev);
0756 
0757     if (bitentry->length != 4) {
0758         NV_ERROR(drm, "Do not understand BIT display table\n");
0759         return -EINVAL;
0760     }
0761 
0762     bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
0763 
0764     return 0;
0765 }
0766 
0767 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
0768 {
0769     /*
0770      * Parses the init table segment that the bit entry points to.
0771      *
0772      * See parse_script_table_pointers for layout
0773      */
0774     struct nouveau_drm *drm = nouveau_drm(dev);
0775 
0776     if (bitentry->length < 14) {
0777         NV_ERROR(drm, "Do not understand init table\n");
0778         return -EINVAL;
0779     }
0780 
0781     parse_script_table_pointers(bios, bitentry->offset);
0782     return 0;
0783 }
0784 
0785 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
0786 {
0787     /*
0788      * BIT 'i' (info?) table
0789      *
0790      * offset + 0  (32 bits): BIOS version dword (as in B table)
0791      * offset + 5  (8  bits): BIOS feature byte (same as for BMP?)
0792      * offset + 13 (16 bits): pointer to table containing DAC load
0793      * detection comparison values
0794      *
0795      * There's other things in the table, purpose unknown
0796      */
0797 
0798     struct nouveau_drm *drm = nouveau_drm(dev);
0799     uint16_t daccmpoffset;
0800     uint8_t dacver, dacheaderlen;
0801 
0802     if (bitentry->length < 6) {
0803         NV_ERROR(drm, "BIT i table too short for needed information\n");
0804         return -EINVAL;
0805     }
0806 
0807     /*
0808      * bit 4 seems to indicate a mobile bios (doesn't suffer from BMP's
0809      * Quadro identity crisis), other bits possibly as for BMP feature byte
0810      */
0811     bios->feature_byte = bios->data[bitentry->offset + 5];
0812     bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
0813 
0814     if (bitentry->length < 15) {
0815         NV_WARN(drm, "BIT i table not long enough for DAC load "
0816                    "detection comparison table\n");
0817         return -EINVAL;
0818     }
0819 
0820     daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
0821 
0822     /* doesn't exist on g80 */
0823     if (!daccmpoffset)
0824         return 0;
0825 
0826     /*
0827      * The first value in the table, following the header, is the
0828      * comparison value, the second entry is a comparison value for
0829      * TV load detection.
0830      */
0831 
0832     dacver = bios->data[daccmpoffset];
0833     dacheaderlen = bios->data[daccmpoffset + 1];
0834 
0835     if (dacver != 0x00 && dacver != 0x10) {
0836         NV_WARN(drm, "DAC load detection comparison table version "
0837                    "%d.%d not known\n", dacver >> 4, dacver & 0xf);
0838         return -ENOSYS;
0839     }
0840 
0841     bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
0842     bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
0843 
0844     return 0;
0845 }
0846 
0847 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
0848 {
0849     /*
0850      * Parses the LVDS table segment that the bit entry points to.
0851      * Starting at bitentry->offset:
0852      *
0853      * offset + 0  (16 bits): LVDS strap xlate table pointer
0854      */
0855 
0856     struct nouveau_drm *drm = nouveau_drm(dev);
0857 
0858     if (bitentry->length != 2) {
0859         NV_ERROR(drm, "Do not understand BIT LVDS table\n");
0860         return -EINVAL;
0861     }
0862 
0863     /*
0864      * No idea if it's still called the LVDS manufacturer table, but
0865      * the concept's close enough.
0866      */
0867     bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
0868 
0869     return 0;
0870 }
0871 
0872 static int
0873 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
0874               struct bit_entry *bitentry)
0875 {
0876     /*
0877      * offset + 2  (8  bits): number of options in an
0878      *  INIT_RAM_RESTRICT_ZM_REG_GROUP opcode option set
0879      * offset + 3  (16 bits): pointer to strap xlate table for RAM
0880      *  restrict option selection
0881      *
0882      * There's a bunch of bits in this table other than the RAM restrict
0883      * stuff that we don't use - their use currently unknown
0884      */
0885 
0886     /*
0887      * Older bios versions don't have a sufficiently long table for
0888      * what we want
0889      */
0890     if (bitentry->length < 0x5)
0891         return 0;
0892 
0893     if (bitentry->version < 2) {
0894         bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
0895         bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
0896     } else {
0897         bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
0898         bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
0899     }
0900 
0901     return 0;
0902 }
0903 
0904 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
0905 {
0906     /*
0907      * Parses the pointer to the TMDS table
0908      *
0909      * Starting at bitentry->offset:
0910      *
0911      * offset + 0  (16 bits): TMDS table pointer
0912      *
0913      * The TMDS table is typically found just before the DCB table, with a
0914      * characteristic signature of 0x11,0x13 (1.1 being version, 0x13 being
0915      * length?)
0916      *
0917      * At offset +7 is a pointer to a script, which I don't know how to
0918      * run yet.
0919      * At offset +9 is a pointer to another script, likewise
0920      * Offset +11 has a pointer to a table where the first word is a pxclk
0921      * frequency and the second word a pointer to a script, which should be
0922      * run if the comparison pxclk frequency is less than the pxclk desired.
0923      * This repeats for decreasing comparison frequencies
0924      * Offset +13 has a pointer to a similar table
0925      * The selection of table (and possibly +7/+9 script) is dictated by
0926      * "or" from the DCB.
0927      */
0928 
0929     struct nouveau_drm *drm = nouveau_drm(dev);
0930     uint16_t tmdstableptr, script1, script2;
0931 
0932     if (bitentry->length != 2) {
0933         NV_ERROR(drm, "Do not understand BIT TMDS table\n");
0934         return -EINVAL;
0935     }
0936 
0937     tmdstableptr = ROM16(bios->data[bitentry->offset]);
0938     if (!tmdstableptr) {
0939         NV_INFO(drm, "Pointer to TMDS table not found\n");
0940         return -EINVAL;
0941     }
0942 
0943     NV_INFO(drm, "TMDS table version %d.%d\n",
0944         bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
0945 
0946     /* nv50+ has v2.0, but we don't parse it atm */
0947     if (bios->data[tmdstableptr] != 0x11)
0948         return -ENOSYS;
0949 
0950     /*
0951      * These two scripts are odd: they don't seem to get run even when
0952      * they are not stubbed.
0953      */
0954     script1 = ROM16(bios->data[tmdstableptr + 7]);
0955     script2 = ROM16(bios->data[tmdstableptr + 9]);
0956     if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
0957         NV_WARN(drm, "TMDS table script pointers not stubbed\n");
0958 
0959     bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
0960     bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
0961 
0962     return 0;
0963 }
0964 
0965 struct bit_table {
0966     const char id;
0967     int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
0968 };
0969 
0970 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
0971 
0972 int
0973 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
0974 {
0975     struct nouveau_drm *drm = nouveau_drm(dev);
0976     struct nvbios *bios = &drm->vbios;
0977     u8 entries, *entry;
0978 
0979     if (bios->type != NVBIOS_BIT)
0980         return -ENODEV;
0981 
0982     entries = bios->data[bios->offset + 10];
0983     entry   = &bios->data[bios->offset + 12];
0984     while (entries--) {
0985         if (entry[0] == id) {
0986             bit->id = entry[0];
0987             bit->version = entry[1];
0988             bit->length = ROM16(entry[2]);
0989             bit->offset = ROM16(entry[4]);
0990             bit->data = ROMPTR(dev, entry[4]);
0991             return 0;
0992         }
0993 
0994         entry += bios->data[bios->offset + 9];
0995     }
0996 
0997     return -ENOENT;
0998 }
0999 
1000 static int
1001 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
1002         struct bit_table *table)
1003 {
1004     struct drm_device *dev = bios->dev;
1005     struct nouveau_drm *drm = nouveau_drm(dev);
1006     struct bit_entry bitentry;
1007 
1008     if (bit_table(dev, table->id, &bitentry) == 0)
1009         return table->parse_fn(dev, bios, &bitentry);
1010 
1011     NV_INFO(drm, "BIT table '%c' not found\n", table->id);
1012     return -ENOSYS;
1013 }
1014 
1015 static int
1016 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
1017 {
1018     int ret;
1019 
1020     /*
1021      * The only restriction on parsing order currently is having 'i' first
1022      * for use of bios->*_version or bios->feature_byte while parsing;
1023      * functions shouldn't be actually *doing* anything apart from pulling
1024      * data from the image into the bios struct, thus no interdependencies
1025      */
1026     ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
1027     if (ret) /* info? */
1028         return ret;
1029     if (bios->major_version >= 0x60) /* g80+ */
1030         parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
1031     parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
1032     ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
1033     if (ret)
1034         return ret;
1035     parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M)); /* memory? */
1036     parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
1037     parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
1038 
1039     return 0;
1040 }
1041 
1042 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
1043 {
1044     /*
1045      * Parses the BMP structure for useful things, but does not act on them
1046      *
1047      * offset +   5: BMP major version
1048      * offset +   6: BMP minor version
1049      * offset +   9: BMP feature byte
1050      * offset +  10: BCD encoded BIOS version
1051      *
1052      * offset +  18: init script table pointer (for bios versions < 5.10h)
1053      * offset +  20: extra init script table pointer (for bios
1054      * versions < 5.10h)
1055      *
1056      * offset +  24: memory init table pointer (used on early bios versions)
1057      * offset +  26: SDR memory sequencing setup data table
1058      * offset +  28: DDR memory sequencing setup data table
1059      *
1060      * offset +  54: index of I2C CRTC pair to use for CRT output
1061      * offset +  55: index of I2C CRTC pair to use for TV output
1062      * offset +  56: index of I2C CRTC pair to use for flat panel output
1063      * offset +  58: write CRTC index for I2C pair 0
1064      * offset +  59: read CRTC index for I2C pair 0
1065      * offset +  60: write CRTC index for I2C pair 1
1066      * offset +  61: read CRTC index for I2C pair 1
1067      *
1068      * offset +  67: maximum internal PLL frequency (single stage PLL)
1069      * offset +  71: minimum internal PLL frequency (single stage PLL)
1070      *
1071      * offset +  75: script table pointers, as described in
1072      * parse_script_table_pointers
1073      *
1074      * offset +  89: TMDS single link output A table pointer
1075      * offset +  91: TMDS single link output B table pointer
1076      * offset +  95: LVDS single link output A table pointer
1077      * offset + 105: flat panel timings table pointer
1078      * offset + 107: flat panel strapping translation table pointer
1079      * offset + 117: LVDS manufacturer panel config table pointer
1080      * offset + 119: LVDS manufacturer strapping translation table pointer
1081      *
1082      * offset + 142: PLL limits table pointer
1083      *
1084      * offset + 156: minimum pixel clock for LVDS dual link
1085      */
1086 
1087     struct nouveau_drm *drm = nouveau_drm(dev);
1088     uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
1089     uint16_t bmplength;
1090     uint16_t legacy_scripts_offset, legacy_i2c_offset;
1091 
1092     /* load needed defaults in case we can't parse this info */
1093     bios->digital_min_front_porch = 0x4b;
1094     bios->fmaxvco = 256000;
1095     bios->fminvco = 128000;
1096     bios->fp.duallink_transition_clk = 90000;
1097 
1098     bmp_version_major = bmp[5];
1099     bmp_version_minor = bmp[6];
1100 
1101     NV_INFO(drm, "BMP version %d.%d\n",
1102          bmp_version_major, bmp_version_minor);
1103 
1104     /*
1105      * Make sure that 0x36 is blank and can't be mistaken for a DCB
1106      * pointer on early versions
1107      */
1108     if (bmp_version_major < 5)
1109         *(uint16_t *)&bios->data[0x36] = 0;
1110 
1111     /*
1112      * Seems that the minor version was 1 for all major versions prior
1113      * to 5. Version 6 could theoretically exist, but I suspect BIT
1114      * happened instead.
1115      */
1116     if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
1117         NV_ERROR(drm, "You have an unsupported BMP version. "
1118                 "Please send in your bios\n");
1119         return -ENOSYS;
1120     }
1121 
1122     if (bmp_version_major == 0)
1123         /* nothing that's currently useful in this version */
1124         return 0;
1125     else if (bmp_version_major == 1)
1126         bmplength = 44; /* exact for 1.01 */
1127     else if (bmp_version_major == 2)
1128         bmplength = 48; /* exact for 2.01 */
1129     else if (bmp_version_major == 3)
1130         bmplength = 54;
1131         /* guessed - mem init tables added in this version */
1132     else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
1133         /* don't know if 5.0 exists... */
1134         bmplength = 62;
1135         /* guessed - BMP I2C indices added in version 4*/
1136     else if (bmp_version_minor < 0x6)
1137         bmplength = 67; /* exact for 5.01 */
1138     else if (bmp_version_minor < 0x10)
1139         bmplength = 75; /* exact for 5.06 */
1140     else if (bmp_version_minor == 0x10)
1141         bmplength = 89; /* exact for 5.10h */
1142     else if (bmp_version_minor < 0x14)
1143         bmplength = 118; /* exact for 5.11h */
1144     else if (bmp_version_minor < 0x24)
1145         /*
1146          * Not sure of version where pll limits came in;
1147          * certainly exist by 0x24 though.
1148          */
1149         /* length not exact: this is long enough to get lvds members */
1150         bmplength = 123;
1151     else if (bmp_version_minor < 0x27)
1152         /*
1153          * Length not exact: this is long enough to get pll limit
1154          * member
1155          */
1156         bmplength = 144;
1157     else
1158         /*
1159          * Length not exact: this is long enough to get dual link
1160          * transition clock.
1161          */
1162         bmplength = 158;
1163 
1164     /* checksum */
1165     if (nv_cksum(bmp, 8)) {
1166         NV_ERROR(drm, "Bad BMP checksum\n");
1167         return -EINVAL;
1168     }
1169 
1170     /*
1171      * Bit 4 seems to indicate either a mobile bios or a quadro card --
1172      * mobile behaviour consistent (nv11+), quadro only seen nv18gl-nv36gl
1173      * (not nv10gl), bit 5 that the flat panel tables are present, and
1174      * bit 6 a tv bios.
1175      */
1176     bios->feature_byte = bmp[9];
1177 
1178     if (bmp_version_major < 5 || bmp_version_minor < 0x10)
1179         bios->old_style_init = true;
1180     legacy_scripts_offset = 18;
1181     if (bmp_version_major < 2)
1182         legacy_scripts_offset -= 4;
1183     bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
1184     bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
1185 
1186     if (bmp_version_major > 2) {    /* appears in BMP 3 */
1187         bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
1188         bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
1189         bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
1190     }
1191 
1192     legacy_i2c_offset = 0x48;   /* BMP version 2 & 3 */
1193     if (bmplength > 61)
1194         legacy_i2c_offset = offset + 54;
1195     bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
1196     bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
1197     bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
1198 
1199     if (bmplength > 74) {
1200         bios->fmaxvco = ROM32(bmp[67]);
1201         bios->fminvco = ROM32(bmp[71]);
1202     }
1203     if (bmplength > 88)
1204         parse_script_table_pointers(bios, offset + 75);
1205     if (bmplength > 94) {
1206         bios->tmds.output0_script_ptr = ROM16(bmp[89]);
1207         bios->tmds.output1_script_ptr = ROM16(bmp[91]);
1208         /*
1209          * Never observed in use with lvds scripts, but is reused for
1210          * 18/24 bit panel interface default for EDID equipped panels
1211          * (if_is_24bit not set directly to avoid any oscillation).
1212          */
1213         bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
1214     }
1215     if (bmplength > 108) {
1216         bios->fp.fptablepointer = ROM16(bmp[105]);
1217         bios->fp.fpxlatetableptr = ROM16(bmp[107]);
1218         bios->fp.xlatwidth = 1;
1219     }
1220     if (bmplength > 120) {
1221         bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
1222         bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
1223     }
1224 #if 0
1225     if (bmplength > 143)
1226         bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
1227 #endif
1228 
1229     if (bmplength > 157)
1230         bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
1231 
1232     return 0;
1233 }
1234 
1235 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
1236 {
1237     int i, j;
1238 
1239     for (i = 0; i <= (n - len); i++) {
1240         for (j = 0; j < len; j++)
1241             if (data[i + j] != str[j])
1242                 break;
1243         if (j == len)
1244             return i;
1245     }
1246 
1247     return 0;
1248 }
1249 
1250 void *
1251 olddcb_table(struct drm_device *dev)
1252 {
1253     struct nouveau_drm *drm = nouveau_drm(dev);
1254     u8 *dcb = NULL;
1255 
1256     if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT)
1257         dcb = ROMPTR(dev, drm->vbios.data[0x36]);
1258     if (!dcb) {
1259         NV_WARN(drm, "No DCB data found in VBIOS\n");
1260         return NULL;
1261     }
1262 
1263     if (dcb[0] >= 0x42) {
1264         NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
1265         return NULL;
1266     } else
1267     if (dcb[0] >= 0x30) {
1268         if (ROM32(dcb[6]) == 0x4edcbdcb)
1269             return dcb;
1270     } else
1271     if (dcb[0] >= 0x20) {
1272         if (ROM32(dcb[4]) == 0x4edcbdcb)
1273             return dcb;
1274     } else
1275     if (dcb[0] >= 0x15) {
1276         if (!memcmp(&dcb[-7], "DEV_REC", 7))
1277             return dcb;
1278     } else {
1279         /*
1280          * v1.4 (some NV15/16, NV11+) seems the same as v1.5, but
1281          * always has the same single (crt) entry, even when tv-out
1282          * present, so the conclusion is this version cannot really
1283          * be used.
1284          *
1285          * v1.2 tables (some NV6/10, and NV15+) normally have the
1286          * same 5 entries, which are not specific to the card and so
1287          * no use.
1288          *
1289          * v1.2 does have an I2C table that read_dcb_i2c_table can
1290          * handle, but cards exist (nv11 in #14821) with a bad i2c
1291          * table pointer, so use the indices parsed in
1292          * parse_bmp_structure.
1293          *
1294          * v1.1 (NV5+, maybe some NV4) is entirely unhelpful
1295          */
1296         NV_WARN(drm, "No useful DCB data in VBIOS\n");
1297         return NULL;
1298     }
1299 
1300     NV_WARN(drm, "DCB header validation failed\n");
1301     return NULL;
1302 }
1303 
1304 void *
1305 olddcb_outp(struct drm_device *dev, u8 idx)
1306 {
1307     u8 *dcb = olddcb_table(dev);
1308     if (dcb && dcb[0] >= 0x30) {
1309         if (idx < dcb[2])
1310             return dcb + dcb[1] + (idx * dcb[3]);
1311     } else
1312     if (dcb && dcb[0] >= 0x20) {
1313         u8 *i2c = ROMPTR(dev, dcb[2]);
1314         u8 *ent = dcb + 8 + (idx * 8);
1315         if (i2c && ent < i2c)
1316             return ent;
1317     } else
1318     if (dcb && dcb[0] >= 0x15) {
1319         u8 *i2c = ROMPTR(dev, dcb[2]);
1320         u8 *ent = dcb + 4 + (idx * 10);
1321         if (i2c && ent < i2c)
1322             return ent;
1323     }
1324 
1325     return NULL;
1326 }
1327 
1328 int
1329 olddcb_outp_foreach(struct drm_device *dev, void *data,
1330          int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
1331 {
1332     int ret, idx = -1;
1333     u8 *outp = NULL;
1334     while ((outp = olddcb_outp(dev, ++idx))) {
1335         if (ROM32(outp[0]) == 0x00000000)
1336             break; /* seen on an NV11 with DCB v1.5 */
1337         if (ROM32(outp[0]) == 0xffffffff)
1338             break; /* seen on an NV17 with DCB v2.0 */
1339 
1340         if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
1341             continue;
1342         if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
1343             break;
1344 
1345         ret = exec(dev, data, idx, outp);
1346         if (ret)
1347             return ret;
1348     }
1349 
1350     return 0;
1351 }
1352 
1353 u8 *
1354 olddcb_conntab(struct drm_device *dev)
1355 {
1356     u8 *dcb = olddcb_table(dev);
1357     if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
1358         u8 *conntab = ROMPTR(dev, dcb[0x14]);
1359         if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
1360             return conntab;
1361     }
1362     return NULL;
1363 }
1364 
1365 u8 *
1366 olddcb_conn(struct drm_device *dev, u8 idx)
1367 {
1368     u8 *conntab = olddcb_conntab(dev);
1369     if (conntab && idx < conntab[2])
1370         return conntab + conntab[1] + (idx * conntab[3]);
1371     return NULL;
1372 }
1373 
1374 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
1375 {
1376     struct dcb_output *entry = &dcb->entry[dcb->entries];
1377 
1378     memset(entry, 0, sizeof(struct dcb_output));
1379     entry->index = dcb->entries++;
1380 
1381     return entry;
1382 }
1383 
1384 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
1385                  int heads, int or)
1386 {
1387     struct dcb_output *entry = new_dcb_entry(dcb);
1388 
1389     entry->type = type;
1390     entry->i2c_index = i2c;
1391     entry->heads = heads;
1392     if (type != DCB_OUTPUT_ANALOG)
1393         entry->location = !DCB_LOC_ON_CHIP; /* ie OFF CHIP */
1394     entry->or = or;
1395 }
1396 
1397 static bool
1398 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
1399           uint32_t conn, uint32_t conf, struct dcb_output *entry)
1400 {
1401     struct nouveau_drm *drm = nouveau_drm(dev);
1402     int link = 0;
1403 
1404     entry->type = conn & 0xf;
1405     entry->i2c_index = (conn >> 4) & 0xf;
1406     entry->heads = (conn >> 8) & 0xf;
1407     entry->connector = (conn >> 12) & 0xf;
1408     entry->bus = (conn >> 16) & 0xf;
1409     entry->location = (conn >> 20) & 0x3;
1410     entry->or = (conn >> 24) & 0xf;
1411 
1412     switch (entry->type) {
1413     case DCB_OUTPUT_ANALOG:
1414         /*
1415          * Although the rest of a CRT conf dword is usually
1416          * zeros, mac biosen have stuff there so we must mask
1417          */
1418         entry->crtconf.maxfreq = (dcb->version < 0x30) ?
1419                      (conf & 0xffff) * 10 :
1420                      (conf & 0xff) * 10000;
1421         break;
1422     case DCB_OUTPUT_LVDS:
1423         {
1424         uint32_t mask;
1425         if (conf & 0x1)
1426             entry->lvdsconf.use_straps_for_mode = true;
1427         if (dcb->version < 0x22) {
1428             mask = ~0xd;
1429             /*
1430              * The laptop in bug 14567 lies and claims to not use
1431              * straps when it does, so assume all DCB 2.0 laptops
1432              * use straps, until a broken EDID using one is produced
1433              */
1434             entry->lvdsconf.use_straps_for_mode = true;
1435             /*
1436              * Both 0x4 and 0x8 show up in v2.0 tables; assume they
1437              * mean the same thing (probably wrong, but might work)
1438              */
1439             if (conf & 0x4 || conf & 0x8)
1440                 entry->lvdsconf.use_power_scripts = true;
1441         } else {
1442             mask = ~0x7;
1443             if (conf & 0x2)
1444                 entry->lvdsconf.use_acpi_for_edid = true;
1445             if (conf & 0x4)
1446                 entry->lvdsconf.use_power_scripts = true;
1447             entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
1448             link = entry->lvdsconf.sor.link;
1449         }
1450         if (conf & mask) {
1451             /*
1452              * Until we even try to use these on G8x, it's
1453              * useless reporting unknown bits.  They all are.
1454              */
1455             if (dcb->version >= 0x40)
1456                 break;
1457 
1458             NV_ERROR(drm, "Unknown LVDS configuration bits, "
1459                       "please report\n");
1460         }
1461         break;
1462         }
1463     case DCB_OUTPUT_TV:
1464     {
1465         if (dcb->version >= 0x30)
1466             entry->tvconf.has_component_output = conf & (0x8 << 4);
1467         else
1468             entry->tvconf.has_component_output = false;
1469 
1470         break;
1471     }
1472     case DCB_OUTPUT_DP:
1473         entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
1474         entry->extdev = (conf & 0x0000ff00) >> 8;
1475         switch ((conf & 0x00e00000) >> 21) {
1476         case 0:
1477             entry->dpconf.link_bw = 162000;
1478             break;
1479         case 1:
1480             entry->dpconf.link_bw = 270000;
1481             break;
1482         case 2:
1483             entry->dpconf.link_bw = 540000;
1484             break;
1485         case 3:
1486         default:
1487             entry->dpconf.link_bw = 810000;
1488             break;
1489         }
1490         switch ((conf & 0x0f000000) >> 24) {
1491         case 0xf:
1492         case 0x4:
1493             entry->dpconf.link_nr = 4;
1494             break;
1495         case 0x3:
1496         case 0x2:
1497             entry->dpconf.link_nr = 2;
1498             break;
1499         default:
1500             entry->dpconf.link_nr = 1;
1501             break;
1502         }
1503         link = entry->dpconf.sor.link;
1504         break;
1505     case DCB_OUTPUT_TMDS:
1506         if (dcb->version >= 0x40) {
1507             entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
1508             entry->extdev = (conf & 0x0000ff00) >> 8;
1509             link = entry->tmdsconf.sor.link;
1510         }
1511         else if (dcb->version >= 0x30)
1512             entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
1513         else if (dcb->version >= 0x22)
1514             entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
1515         break;
1516     case DCB_OUTPUT_EOL:
1517         /* weird g80 mobile type that "nv" treats as a terminator */
1518         dcb->entries--;
1519         return false;
1520     default:
1521         break;
1522     }
1523 
1524     if (dcb->version < 0x40) {
1525         /* Normal entries consist of a single bit, but dual link has
1526          * the next most significant bit set too
1527          */
1528         entry->duallink_possible =
1529             ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
1530     } else {
1531         entry->duallink_possible = (entry->sorconf.link == 3);
1532     }
1533 
1534     /* unsure what DCB version introduces this, 3.0? */
1535     if (conf & 0x100000)
1536         entry->i2c_upper_default = true;
1537 
1538     entry->hasht = (entry->extdev << 8) | (entry->location << 4) |
1539             entry->type;
1540     entry->hashm = (entry->heads << 8) | (link << 6) | entry->or;
1541     return true;
1542 }
1543 
1544 static bool
1545 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
1546           uint32_t conn, uint32_t conf, struct dcb_output *entry)
1547 {
1548     struct nouveau_drm *drm = nouveau_drm(dev);
1549 
1550     switch (conn & 0x0000000f) {
1551     case 0:
1552         entry->type = DCB_OUTPUT_ANALOG;
1553         break;
1554     case 1:
1555         entry->type = DCB_OUTPUT_TV;
1556         break;
1557     case 2:
1558     case 4:
1559         if (conn & 0x10)
1560             entry->type = DCB_OUTPUT_LVDS;
1561         else
1562             entry->type = DCB_OUTPUT_TMDS;
1563         break;
1564     case 3:
1565         entry->type = DCB_OUTPUT_LVDS;
1566         break;
1567     default:
1568         NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
1569         return false;
1570     }
1571 
1572     entry->i2c_index = (conn & 0x0003c000) >> 14;
1573     entry->heads = ((conn & 0x001c0000) >> 18) + 1;
1574     entry->or = entry->heads; /* same as heads, hopefully safe enough */
1575     entry->location = (conn & 0x01e00000) >> 21;
1576     entry->bus = (conn & 0x0e000000) >> 25;
1577     entry->duallink_possible = false;
1578 
1579     switch (entry->type) {
1580     case DCB_OUTPUT_ANALOG:
1581         entry->crtconf.maxfreq = (conf & 0xffff) * 10;
1582         break;
1583     case DCB_OUTPUT_TV:
1584         entry->tvconf.has_component_output = false;
1585         break;
1586     case DCB_OUTPUT_LVDS:
1587         if ((conn & 0x00003f00) >> 8 != 0x10)
1588             entry->lvdsconf.use_straps_for_mode = true;
1589         entry->lvdsconf.use_power_scripts = true;
1590         break;
1591     default:
1592         break;
1593     }
1594 
1595     return true;
1596 }
1597 
1598 static
1599 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
1600 {
1601     /*
1602      * DCB v2.0 lists each output combination separately.
1603      * Here we merge compatible entries to have fewer outputs, with
1604      * more options
1605      */
1606 
1607     struct nouveau_drm *drm = nouveau_drm(dev);
1608     int i, newentries = 0;
1609 
1610     for (i = 0; i < dcb->entries; i++) {
1611         struct dcb_output *ient = &dcb->entry[i];
1612         int j;
1613 
1614         for (j = i + 1; j < dcb->entries; j++) {
1615             struct dcb_output *jent = &dcb->entry[j];
1616 
1617             if (jent->type == 100) /* already merged entry */
1618                 continue;
1619 
1620             /* merge heads field when all other fields the same */
1621             if (jent->i2c_index == ient->i2c_index &&
1622                 jent->type == ient->type &&
1623                 jent->location == ient->location &&
1624                 jent->or == ient->or) {
1625                 NV_INFO(drm, "Merging DCB entries %d and %d\n",
1626                      i, j);
1627                 ient->heads |= jent->heads;
1628                 jent->type = 100; /* dummy value */
1629             }
1630         }
1631     }
1632 
1633     /* Compact entries merged into others out of dcb */
1634     for (i = 0; i < dcb->entries; i++) {
1635         if (dcb->entry[i].type == 100)
1636             continue;
1637 
1638         if (newentries != i) {
1639             dcb->entry[newentries] = dcb->entry[i];
1640             dcb->entry[newentries].index = newentries;
1641         }
1642         newentries++;
1643     }
1644 
1645     dcb->entries = newentries;
1646 }
1647 
1648 static bool
1649 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
1650 {
1651     struct nouveau_drm *drm = nouveau_drm(dev);
1652     struct dcb_table *dcb = &drm->vbios.dcb;
1653 
1654     /* Dell Precision M6300
1655      *   DCB entry 2: 02025312 00000010
1656      *   DCB entry 3: 02026312 00000020
1657      *
1658      * Identical, except apparently a different connector on a
1659      * different SOR link.  Not a clue how we're supposed to know
1660      * which one is in use if it even shares an i2c line...
1661      *
1662      * Ignore the connector on the second SOR link to prevent
1663      * nasty problems until this is sorted (assuming it's not a
1664      * VBIOS bug).
1665      */
1666     if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {
1667         if (*conn == 0x02026312 && *conf == 0x00000020)
1668             return false;
1669     }
1670 
1671     /* GeForce3 Ti 200
1672      *
1673      * DCB reports an LVDS output that should be TMDS:
1674      *   DCB entry 1: f2005014 ffffffff
1675      */
1676     if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
1677         if (*conn == 0xf2005014 && *conf == 0xffffffff) {
1678             fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1);
1679             return false;
1680         }
1681     }
1682 
1683     /* XFX GT-240X-YA
1684      *
1685      * So many things wrong here, replace the entire encoder table..
1686      */
1687     if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {
1688         if (idx == 0) {
1689             *conn = 0x02001300; /* VGA, connector 1 */
1690             *conf = 0x00000028;
1691         } else
1692         if (idx == 1) {
1693             *conn = 0x01010312; /* DVI, connector 0 */
1694             *conf = 0x00020030;
1695         } else
1696         if (idx == 2) {
1697             *conn = 0x01010310; /* VGA, connector 0 */
1698             *conf = 0x00000028;
1699         } else
1700         if (idx == 3) {
1701             *conn = 0x02022362; /* HDMI, connector 2 */
1702             *conf = 0x00020010;
1703         } else {
1704             *conn = 0x0000000e; /* EOL */
1705             *conf = 0x00000000;
1706         }
1707     }
1708 
1709     /* Some other twisted XFX board (rhbz#694914)
1710      *
1711      * The DVI/VGA encoder combo that's supposed to represent the
1712      * DVI-I connector actually point at two different ones, and
1713      * the HDMI connector ends up paired with the VGA instead.
1714      *
1715      * Connector table is missing anything for VGA at all, pointing it
1716      * an invalid conntab entry 2 so we figure it out ourself.
1717      */
1718     if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
1719         if (idx == 0) {
1720             *conn = 0x02002300; /* VGA, connector 2 */
1721             *conf = 0x00000028;
1722         } else
1723         if (idx == 1) {
1724             *conn = 0x01010312; /* DVI, connector 0 */
1725             *conf = 0x00020030;
1726         } else
1727         if (idx == 2) {
1728             *conn = 0x04020310; /* VGA, connector 0 */
1729             *conf = 0x00000028;
1730         } else
1731         if (idx == 3) {
1732             *conn = 0x02021322; /* HDMI, connector 1 */
1733             *conf = 0x00020010;
1734         } else {
1735             *conn = 0x0000000e; /* EOL */
1736             *conf = 0x00000000;
1737         }
1738     }
1739 
1740     /* fdo#50830: connector indices for VGA and DVI-I are backwards */
1741     if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {
1742         if (idx == 0 && *conn == 0x02000300)
1743             *conn = 0x02011300;
1744         else
1745         if (idx == 1 && *conn == 0x04011310)
1746             *conn = 0x04000310;
1747         else
1748         if (idx == 2 && *conn == 0x02011312)
1749             *conn = 0x02000312;
1750     }
1751 
1752     return true;
1753 }
1754 
1755 static void
1756 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
1757 {
1758     struct dcb_table *dcb = &bios->dcb;
1759     int all_heads = (nv_two_heads(dev) ? 3 : 1);
1760 
1761 #ifdef __powerpc__
1762     /* Apple iMac G4 NV17 */
1763     if (of_machine_is_compatible("PowerMac4,5")) {
1764         fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
1765         fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
1766         return;
1767     }
1768 #endif
1769 
1770     /* Make up some sane defaults */
1771     fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,
1772                  bios->legacy.i2c_indices.crt, 1, 1);
1773 
1774     if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
1775         fabricate_dcb_output(dcb, DCB_OUTPUT_TV,
1776                      bios->legacy.i2c_indices.tv,
1777                      all_heads, 0);
1778 
1779     else if (bios->tmds.output0_script_ptr ||
1780          bios->tmds.output1_script_ptr)
1781         fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,
1782                      bios->legacy.i2c_indices.panel,
1783                      all_heads, 1);
1784 }
1785 
1786 static int
1787 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
1788 {
1789     struct nouveau_drm *drm = nouveau_drm(dev);
1790     struct dcb_table *dcb = &drm->vbios.dcb;
1791     u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
1792     u32 conn = ROM32(outp[0]);
1793     bool ret;
1794 
1795     if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {
1796         struct dcb_output *entry = new_dcb_entry(dcb);
1797 
1798         NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
1799 
1800         if (dcb->version >= 0x20)
1801             ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
1802         else
1803             ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
1804         entry->id = idx;
1805 
1806         if (!ret)
1807             return 1; /* stop parsing */
1808 
1809         /* Ignore the I2C index for on-chip TV-out, as there
1810          * are cards with bogus values (nv31m in bug 23212),
1811          * and it's otherwise useless.
1812          */
1813         if (entry->type == DCB_OUTPUT_TV &&
1814             entry->location == DCB_LOC_ON_CHIP)
1815             entry->i2c_index = 0x0f;
1816     }
1817 
1818     return 0;
1819 }
1820 
1821 static void
1822 dcb_fake_connectors(struct nvbios *bios)
1823 {
1824     struct dcb_table *dcbt = &bios->dcb;
1825     u8 map[16] = { };
1826     int i, idx = 0;
1827 
1828     /* heuristic: if we ever get a non-zero connector field, assume
1829      * that all the indices are valid and we don't need fake them.
1830      *
1831      * and, as usual, a blacklist of boards with bad bios data..
1832      */
1833     if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {
1834         for (i = 0; i < dcbt->entries; i++) {
1835             if (dcbt->entry[i].connector)
1836                 return;
1837         }
1838     }
1839 
1840     /* no useful connector info available, we need to make it up
1841      * ourselves.  the rule here is: anything on the same i2c bus
1842      * is considered to be on the same connector.  any output
1843      * without an associated i2c bus is assigned its own unique
1844      * connector index.
1845      */
1846     for (i = 0; i < dcbt->entries; i++) {
1847         u8 i2c = dcbt->entry[i].i2c_index;
1848         if (i2c == 0x0f) {
1849             dcbt->entry[i].connector = idx++;
1850         } else {
1851             if (!map[i2c])
1852                 map[i2c] = ++idx;
1853             dcbt->entry[i].connector = map[i2c] - 1;
1854         }
1855     }
1856 
1857     /* if we created more than one connector, destroy the connector
1858      * table - just in case it has random, rather than stub, entries.
1859      */
1860     if (i > 1) {
1861         u8 *conntab = olddcb_conntab(bios->dev);
1862         if (conntab)
1863             conntab[0] = 0x00;
1864     }
1865 }
1866 
1867 static int
1868 parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
1869 {
1870     struct nouveau_drm *drm = nouveau_drm(dev);
1871     struct dcb_table *dcb = &bios->dcb;
1872     u8 *dcbt, *conn;
1873     int idx;
1874 
1875     dcbt = olddcb_table(dev);
1876     if (!dcbt) {
1877         /* handle pre-DCB boards */
1878         if (bios->type == NVBIOS_BMP) {
1879             fabricate_dcb_encoder_table(dev, bios);
1880             return 0;
1881         }
1882 
1883         return -EINVAL;
1884     }
1885 
1886     NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
1887 
1888     dcb->version = dcbt[0];
1889     olddcb_outp_foreach(dev, NULL, parse_dcb_entry);
1890 
1891     /*
1892      * apart for v2.1+ not being known for requiring merging, this
1893      * guarantees dcbent->index is the index of the entry in the rom image
1894      */
1895     if (dcb->version < 0x21)
1896         merge_like_dcb_entries(dev, dcb);
1897 
1898     /* dump connector table entries to log, if any exist */
1899     idx = -1;
1900     while ((conn = olddcb_conn(dev, ++idx))) {
1901         if (conn[0] != 0xff) {
1902             if (olddcb_conntab(dev)[3] < 4)
1903                 NV_INFO(drm, "DCB conn %02d: %04x\n",
1904                     idx, ROM16(conn[0]));
1905             else
1906                 NV_INFO(drm, "DCB conn %02d: %08x\n",
1907                     idx, ROM32(conn[0]));
1908         }
1909     }
1910     dcb_fake_connectors(bios);
1911     return 0;
1912 }
1913 
1914 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
1915 {
1916     /*
1917      * The header following the "HWSQ" signature has the number of entries,
1918      * and the entry size
1919      *
1920      * An entry consists of a dword to write to the sequencer control reg
1921      * (0x00001304), followed by the ucode bytes, written sequentially,
1922      * starting at reg 0x00001400
1923      */
1924 
1925     struct nouveau_drm *drm = nouveau_drm(dev);
1926     struct nvif_object *device = &drm->client.device.object;
1927     uint8_t bytes_to_write;
1928     uint16_t hwsq_entry_offset;
1929     int i;
1930 
1931     if (bios->data[hwsq_offset] <= entry) {
1932         NV_ERROR(drm, "Too few entries in HW sequencer table for "
1933                 "requested entry\n");
1934         return -ENOENT;
1935     }
1936 
1937     bytes_to_write = bios->data[hwsq_offset + 1];
1938 
1939     if (bytes_to_write != 36) {
1940         NV_ERROR(drm, "Unknown HW sequencer entry size\n");
1941         return -EINVAL;
1942     }
1943 
1944     NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
1945 
1946     hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
1947 
1948     /* set sequencer control */
1949     nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1950     bytes_to_write -= 4;
1951 
1952     /* write ucode */
1953     for (i = 0; i < bytes_to_write; i += 4)
1954         nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1955 
1956     /* twiddle NV_PBUS_DEBUG_4 */
1957     nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
1958 
1959     return 0;
1960 }
1961 
1962 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
1963                     struct nvbios *bios)
1964 {
1965     /*
1966      * BMP based cards, from NV17, need a microcode loading to correctly
1967      * control the GPIO etc for LVDS panels
1968      *
1969      * BIT based cards seem to do this directly in the init scripts
1970      *
1971      * The microcode entries are found by the "HWSQ" signature.
1972      */
1973 
1974     static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
1975     const int sz = sizeof(hwsq_signature);
1976     int hwsq_offset;
1977 
1978     hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
1979     if (!hwsq_offset)
1980         return 0;
1981 
1982     /* always use entry 0? */
1983     return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
1984 }
1985 
1986 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
1987 {
1988     struct nouveau_drm *drm = nouveau_drm(dev);
1989     struct nvbios *bios = &drm->vbios;
1990     static const uint8_t edid_sig[] = {
1991             0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
1992     uint16_t offset = 0;
1993     uint16_t newoffset;
1994     int searchlen = NV_PROM_SIZE;
1995 
1996     if (bios->fp.edid)
1997         return bios->fp.edid;
1998 
1999     while (searchlen) {
2000         newoffset = findstr(&bios->data[offset], searchlen,
2001                                 edid_sig, 8);
2002         if (!newoffset)
2003             return NULL;
2004         offset += newoffset;
2005         if (!nv_cksum(&bios->data[offset], EDID1_LEN))
2006             break;
2007 
2008         searchlen -= offset;
2009         offset++;
2010     }
2011 
2012     NV_INFO(drm, "Found EDID in BIOS\n");
2013 
2014     return bios->fp.edid = &bios->data[offset];
2015 }
2016 
2017 static bool NVInitVBIOS(struct drm_device *dev)
2018 {
2019     struct nouveau_drm *drm = nouveau_drm(dev);
2020     struct nvkm_bios *bios = nvxx_bios(&drm->client.device);
2021     struct nvbios *legacy = &drm->vbios;
2022 
2023     memset(legacy, 0, sizeof(struct nvbios));
2024     spin_lock_init(&legacy->lock);
2025     legacy->dev = dev;
2026 
2027     legacy->data = bios->data;
2028     legacy->length = bios->size;
2029     legacy->major_version = bios->version.major;
2030     legacy->chip_version = bios->version.chip;
2031     if (bios->bit_offset) {
2032         legacy->type = NVBIOS_BIT;
2033         legacy->offset = bios->bit_offset;
2034         return !parse_bit_structure(legacy, legacy->offset + 6);
2035     } else
2036     if (bios->bmp_offset) {
2037         legacy->type = NVBIOS_BMP;
2038         legacy->offset = bios->bmp_offset;
2039         return !parse_bmp_structure(dev, legacy, legacy->offset);
2040     }
2041 
2042     return false;
2043 }
2044 
2045 int
2046 nouveau_run_vbios_init(struct drm_device *dev)
2047 {
2048     struct nouveau_drm *drm = nouveau_drm(dev);
2049     struct nvbios *bios = &drm->vbios;
2050 
2051     /* Reset the BIOS head to 0. */
2052     bios->state.crtchead = 0;
2053 
2054     if (bios->major_version < 5)    /* BMP only */
2055         load_nv17_hw_sequencer_ucode(dev, bios);
2056 
2057     if (bios->execute) {
2058         bios->fp.last_script_invoc = 0;
2059         bios->fp.lvds_init_run = false;
2060     }
2061 
2062     return 0;
2063 }
2064 
2065 static bool
2066 nouveau_bios_posted(struct drm_device *dev)
2067 {
2068     struct nouveau_drm *drm = nouveau_drm(dev);
2069     unsigned htotal;
2070 
2071     if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
2072         return true;
2073 
2074     htotal  = NVReadVgaCrtc(dev, 0, 0x06);
2075     htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
2076     htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
2077     htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
2078     htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
2079     return (htotal != 0);
2080 }
2081 
2082 int
2083 nouveau_bios_init(struct drm_device *dev)
2084 {
2085     struct nouveau_drm *drm = nouveau_drm(dev);
2086     struct nvbios *bios = &drm->vbios;
2087     int ret;
2088 
2089     /* only relevant for PCI devices */
2090     if (!dev_is_pci(dev->dev))
2091         return 0;
2092 
2093     if (!NVInitVBIOS(dev))
2094         return -ENODEV;
2095 
2096     ret = parse_dcb_table(dev, bios);
2097     if (ret)
2098         return ret;
2099 
2100     if (!bios->major_version)   /* we don't run version 0 bios */
2101         return 0;
2102 
2103     /* init script execution disabled */
2104     bios->execute = false;
2105 
2106     /* ... unless card isn't POSTed already */
2107     if (!nouveau_bios_posted(dev)) {
2108         NV_INFO(drm, "Adaptor not initialised, "
2109             "running VBIOS init tables.\n");
2110         bios->execute = true;
2111     }
2112 
2113     ret = nouveau_run_vbios_init(dev);
2114     if (ret)
2115         return ret;
2116 
2117     /* feature_byte on BMP is poor, but init always sets CR4B */
2118     if (bios->major_version < 5)
2119         bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
2120 
2121     /* all BIT systems need p_f_m_t for digital_min_front_porch */
2122     if (bios->is_mobile || bios->major_version >= 5)
2123         ret = parse_fp_mode_table(dev, bios);
2124 
2125     /* allow subsequent scripts to execute */
2126     bios->execute = true;
2127 
2128     return 0;
2129 }
2130 
2131 void
2132 nouveau_bios_takedown(struct drm_device *dev)
2133 {
2134 }
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