![]() |
|
|||
0001 /* SPDX-License-Identifier: MIT */ 0002 #ifndef __NVBIOS_ICCSENSE_H__ 0003 #define __NVBIOS_ICCSENSE_H__ 0004 struct pwr_rail_resistor_t { 0005 u8 mohm; 0006 bool enabled; 0007 }; 0008 0009 struct pwr_rail_t { 0010 u8 mode; 0011 u8 extdev_id; 0012 u8 resistor_count; 0013 struct pwr_rail_resistor_t resistors[3]; 0014 u16 config; 0015 }; 0016 0017 struct nvbios_iccsense { 0018 int nr_entry; 0019 struct pwr_rail_t *rail; 0020 }; 0021 0022 int nvbios_iccsense_parse(struct nvkm_bios *, struct nvbios_iccsense *); 0023 #endif
[ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
This page was automatically generated by the 2.1.0 LXR engine. The LXR team |
![]() ![]() |