include/nvif/class.h

0001 /* SPDX-License-Identifier: MIT */
0002 #ifndef __NVIF_CLASS_H__
0003 #define __NVIF_CLASS_H__
0004
0005 /* these class numbers are made up by us, and not nvidia-assigned */
0006 #define NVIF_CLASS_CLIENT                            /* if0000.h */ -0x00000000
0007
0008 #define NVIF_CLASS_CONTROL                           /* if0001.h */ -0x00000001
0009
0010 #define NVIF_CLASS_PERFMON                           /* if0002.h */ -0x00000002
0011 #define NVIF_CLASS_PERFDOM                           /* if0003.h */ -0x00000003
0012
0013 #define NVIF_CLASS_SW_NV04                           /* if0004.h */ -0x00000004
0014 #define NVIF_CLASS_SW_NV10                           /* if0005.h */ -0x00000005
0015 #define NVIF_CLASS_SW_NV50                           /* if0005.h */ -0x00000006
0016 #define NVIF_CLASS_SW_GF100                          /* if0005.h */ -0x00000007
0017
0018 #define NVIF_CLASS_MMU                               /* if0008.h */  0x80000008
0019 #define NVIF_CLASS_MMU_NV04                          /* if0008.h */  0x80000009
0020 #define NVIF_CLASS_MMU_NV50                          /* if0008.h */  0x80005009
0021 #define NVIF_CLASS_MMU_GF100                         /* if0008.h */  0x80009009
0022
0023 #define NVIF_CLASS_MEM                               /* if000a.h */  0x8000000a
0024 #define NVIF_CLASS_MEM_NV04                          /* if000b.h */  0x8000000b
0025 #define NVIF_CLASS_MEM_NV50                          /* if500b.h */  0x8000500b
0026 #define NVIF_CLASS_MEM_GF100                         /* if900b.h */  0x8000900b
0027
0028 #define NVIF_CLASS_VMM                               /* if000c.h */  0x8000000c
0029 #define NVIF_CLASS_VMM_NV04                          /* if000d.h */  0x8000000d
0030 #define NVIF_CLASS_VMM_NV50                          /* if500d.h */  0x8000500d
0031 #define NVIF_CLASS_VMM_GF100                         /* if900d.h */  0x8000900d
0032 #define NVIF_CLASS_VMM_GM200                         /* ifb00d.h */  0x8000b00d
0033 #define NVIF_CLASS_VMM_GP100                         /* ifc00d.h */  0x8000c00d
0034
0035 #define NVIF_CLASS_DISP                              /* if0010.h */  0x80000010
0036 #define NVIF_CLASS_CONN                              /* if0011.h */  0x80000011
0037 #define NVIF_CLASS_OUTP                              /* if0012.h */  0x80000012
0038 #define NVIF_CLASS_DISP_CHAN                         /* if0014.h */  0x80000014
0039
0040 /* the below match nvidia-assigned (either in hw, or sw) class numbers */
0041 #define NV_NULL_CLASS                                                0x00000030
0042
0043 #define NV_DEVICE                                     /* cl0080.h */ 0x00000080
0044
0045 #define NV_DMA_FROM_MEMORY                            /* cl0002.h */ 0x00000002
0046 #define NV_DMA_TO_MEMORY                              /* cl0002.h */ 0x00000003
0047 #define NV_DMA_IN_MEMORY                              /* cl0002.h */ 0x0000003d
0048
0049 #define NV50_TWOD                                                    0x0000502d
0050 #define FERMI_TWOD_A                                                 0x0000902d
0051
0052 #define NV50_MEMORY_TO_MEMORY_FORMAT                                 0x00005039
0053 #define FERMI_MEMORY_TO_MEMORY_FORMAT_A                              0x00009039
0054
0055 #define KEPLER_INLINE_TO_MEMORY_A                                    0x0000a040
0056 #define KEPLER_INLINE_TO_MEMORY_B                                    0x0000a140
0057
0058 #define NV04_DISP                                     /* cl0046.h */ 0x00000046
0059
0060 #define VOLTA_USERMODE_A                                             0x0000c361
0061
0062 #define MAXWELL_FAULT_BUFFER_A                        /* clb069.h */ 0x0000b069
0063 #define VOLTA_FAULT_BUFFER_A                          /* clb069.h */ 0x0000c369
0064
0065 #define NV03_CHANNEL_DMA                              /* cl506b.h */ 0x0000006b
0066 #define NV10_CHANNEL_DMA                              /* cl506b.h */ 0x0000006e
0067 #define NV17_CHANNEL_DMA                              /* cl506b.h */ 0x0000176e
0068 #define NV40_CHANNEL_DMA                              /* cl506b.h */ 0x0000406e
0069
0070 #define NV50_CHANNEL_GPFIFO                           /* cl506f.h */ 0x0000506f
0071 #define G82_CHANNEL_GPFIFO                            /* cl826f.h */ 0x0000826f
0072 #define FERMI_CHANNEL_GPFIFO                          /* cl906f.h */ 0x0000906f
0073 #define KEPLER_CHANNEL_GPFIFO_A                       /* cla06f.h */ 0x0000a06f
0074 #define KEPLER_CHANNEL_GPFIFO_B                       /* cla06f.h */ 0x0000a16f
0075 #define MAXWELL_CHANNEL_GPFIFO_A                      /* cla06f.h */ 0x0000b06f
0076 #define PASCAL_CHANNEL_GPFIFO_A                       /* cla06f.h */ 0x0000c06f
0077 #define VOLTA_CHANNEL_GPFIFO_A                        /* clc36f.h */ 0x0000c36f
0078 #define TURING_CHANNEL_GPFIFO_A                       /* clc36f.h */ 0x0000c46f
0079 #define AMPERE_CHANNEL_GPFIFO_B                       /* clc36f.h */ 0x0000c76f
0080
0081 #define NV50_DISP                                     /* if0010.h */ 0x00005070
0082 #define G82_DISP                                      /* if0010.h */ 0x00008270
0083 #define GT200_DISP                                    /* if0010.h */ 0x00008370
0084 #define GT214_DISP                                    /* if0010.h */ 0x00008570
0085 #define GT206_DISP                                    /* if0010.h */ 0x00008870
0086 #define GF110_DISP                                    /* if0010.h */ 0x00009070
0087 #define GK104_DISP                                    /* if0010.h */ 0x00009170
0088 #define GK110_DISP                                    /* if0010.h */ 0x00009270
0089 #define GM107_DISP                                    /* if0010.h */ 0x00009470
0090 #define GM200_DISP                                    /* if0010.h */ 0x00009570
0091 #define GP100_DISP                                    /* if0010.h */ 0x00009770
0092 #define GP102_DISP                                    /* if0010.h */ 0x00009870
0093 #define GV100_DISP                                    /* if0010.h */ 0x0000c370
0094 #define TU102_DISP                                    /* if0010.h */ 0x0000c570
0095 #define GA102_DISP                                    /* if0010.h */ 0x0000c670
0096
0097 #define GV100_DISP_CAPS                                              0x0000c373
0098
0099 #define NV31_MPEG                                                    0x00003174
0100 #define G82_MPEG                                                     0x00008274
0101
0102 #define NV74_VP2                                                     0x00007476
0103
0104 #define NV50_DISP_CURSOR                              /* if0014.h */ 0x0000507a
0105 #define G82_DISP_CURSOR                               /* if0014.h */ 0x0000827a
0106 #define GT214_DISP_CURSOR                             /* if0014.h */ 0x0000857a
0107 #define GF110_DISP_CURSOR                             /* if0014.h */ 0x0000907a
0108 #define GK104_DISP_CURSOR                             /* if0014.h */ 0x0000917a
0109 #define GV100_DISP_CURSOR                             /* if0014.h */ 0x0000c37a
0110 #define TU102_DISP_CURSOR                             /* if0014.h */ 0x0000c57a
0111 #define GA102_DISP_CURSOR                             /* if0014.h */ 0x0000c67a
0112
0113 #define NV50_DISP_OVERLAY                             /* if0014.h */ 0x0000507b
0114 #define G82_DISP_OVERLAY                              /* if0014.h */ 0x0000827b
0115 #define GT214_DISP_OVERLAY                            /* if0014.h */ 0x0000857b
0116 #define GF110_DISP_OVERLAY                            /* if0014.h */ 0x0000907b
0117 #define GK104_DISP_OVERLAY                            /* if0014.h */ 0x0000917b
0118
0119 #define GV100_DISP_WINDOW_IMM_CHANNEL_DMA             /* if0014.h */ 0x0000c37b
0120 #define TU102_DISP_WINDOW_IMM_CHANNEL_DMA             /* if0014.h */ 0x0000c57b
0121 #define GA102_DISP_WINDOW_IMM_CHANNEL_DMA             /* if0014.h */ 0x0000c67b
0122
0123 #define NV50_DISP_BASE_CHANNEL_DMA                    /* if0014.h */ 0x0000507c
0124 #define G82_DISP_BASE_CHANNEL_DMA                     /* if0014.h */ 0x0000827c
0125 #define GT200_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000837c
0126 #define GT214_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000857c
0127 #define GF110_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000907c
0128 #define GK104_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000917c
0129 #define GK110_DISP_BASE_CHANNEL_DMA                   /* if0014.h */ 0x0000927c
0130
0131 #define NV50_DISP_CORE_CHANNEL_DMA                    /* if0014.h */ 0x0000507d
0132 #define G82_DISP_CORE_CHANNEL_DMA                     /* if0014.h */ 0x0000827d
0133 #define GT200_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000837d
0134 #define GT214_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000857d
0135 #define GT206_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000887d
0136 #define GF110_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000907d
0137 #define GK104_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000917d
0138 #define GK110_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000927d
0139 #define GM107_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000947d
0140 #define GM200_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000957d
0141 #define GP100_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000977d
0142 #define GP102_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000987d
0143 #define GV100_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000c37d
0144 #define TU102_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000c57d
0145 #define GA102_DISP_CORE_CHANNEL_DMA                   /* if0014.h */ 0x0000c67d
0146
0147 #define NV50_DISP_OVERLAY_CHANNEL_DMA                 /* if0014.h */ 0x0000507e
0148 #define G82_DISP_OVERLAY_CHANNEL_DMA                  /* if0014.h */ 0x0000827e
0149 #define GT200_DISP_OVERLAY_CHANNEL_DMA                /* if0014.h */ 0x0000837e
0150 #define GT214_DISP_OVERLAY_CHANNEL_DMA                /* if0014.h */ 0x0000857e
0151 #define GF110_DISP_OVERLAY_CONTROL_DMA                /* if0014.h */ 0x0000907e
0152 #define GK104_DISP_OVERLAY_CONTROL_DMA                /* if0014.h */ 0x0000917e
0153
0154 #define GV100_DISP_WINDOW_CHANNEL_DMA                 /* if0014.h */ 0x0000c37e
0155 #define TU102_DISP_WINDOW_CHANNEL_DMA                 /* if0014.h */ 0x0000c57e
0156 #define GA102_DISP_WINDOW_CHANNEL_DMA                 /* if0014.h */ 0x0000c67e
0157
0158 #define NV50_TESLA                                                   0x00005097
0159 #define G82_TESLA                                                    0x00008297
0160 #define GT200_TESLA                                                  0x00008397
0161 #define GT214_TESLA                                                  0x00008597
0162 #define GT21A_TESLA                                                  0x00008697
0163
0164 #define FERMI_A                                       /* cl9097.h */ 0x00009097
0165 #define FERMI_B                                       /* cl9097.h */ 0x00009197
0166 #define FERMI_C                                       /* cl9097.h */ 0x00009297
0167
0168 #define KEPLER_A                                      /* cl9097.h */ 0x0000a097
0169 #define KEPLER_B                                      /* cl9097.h */ 0x0000a197
0170 #define KEPLER_C                                      /* cl9097.h */ 0x0000a297
0171
0172 #define MAXWELL_A                                     /* cl9097.h */ 0x0000b097
0173 #define MAXWELL_B                                     /* cl9097.h */ 0x0000b197
0174
0175 #define PASCAL_A                                      /* cl9097.h */ 0x0000c097
0176 #define PASCAL_B                                      /* cl9097.h */ 0x0000c197
0177
0178 #define VOLTA_A                                       /* cl9097.h */ 0x0000c397
0179
0180 #define TURING_A                                      /* cl9097.h */ 0x0000c597
0181
0182 #define NV74_BSP                                                     0x000074b0
0183
0184 #define GT212_MSVLD                                                  0x000085b1
0185 #define IGT21A_MSVLD                                                 0x000086b1
0186 #define G98_MSVLD                                                    0x000088b1
0187 #define GF100_MSVLD                                                  0x000090b1
0188 #define GK104_MSVLD                                                  0x000095b1
0189
0190 #define GT212_MSPDEC                                                 0x000085b2
0191 #define G98_MSPDEC                                                   0x000088b2
0192 #define GF100_MSPDEC                                                 0x000090b2
0193 #define GK104_MSPDEC                                                 0x000095b2
0194
0195 #define GT212_MSPPP                                                  0x000085b3
0196 #define G98_MSPPP                                                    0x000088b3
0197 #define GF100_MSPPP                                                  0x000090b3
0198
0199 #define G98_SEC                                                      0x000088b4
0200
0201 #define GT212_DMA                                                    0x000085b5
0202 #define FERMI_DMA                                                    0x000090b5
0203 #define KEPLER_DMA_COPY_A                                            0x0000a0b5
0204 #define MAXWELL_DMA_COPY_A                                           0x0000b0b5
0205 #define PASCAL_DMA_COPY_A                                            0x0000c0b5
0206 #define PASCAL_DMA_COPY_B                                            0x0000c1b5
0207 #define VOLTA_DMA_COPY_A                                             0x0000c3b5
0208 #define TURING_DMA_COPY_A                                            0x0000c5b5
0209 #define AMPERE_DMA_COPY_B                                            0x0000c7b5
0210
0211 #define FERMI_DECOMPRESS                                             0x000090b8
0212
0213 #define NV50_COMPUTE                                                 0x000050c0
0214 #define GT214_COMPUTE                                                0x000085c0
0215 #define FERMI_COMPUTE_A                                              0x000090c0
0216 #define FERMI_COMPUTE_B                                              0x000091c0
0217 #define KEPLER_COMPUTE_A                                             0x0000a0c0
0218 #define KEPLER_COMPUTE_B                                             0x0000a1c0
0219 #define MAXWELL_COMPUTE_A                                            0x0000b0c0
0220 #define MAXWELL_COMPUTE_B                                            0x0000b1c0
0221 #define PASCAL_COMPUTE_A                                             0x0000c0c0
0222 #define PASCAL_COMPUTE_B                                             0x0000c1c0
0223 #define VOLTA_COMPUTE_A                                              0x0000c3c0
0224 #define TURING_COMPUTE_A                                             0x0000c5c0
0225
0226 #define NV74_CIPHER                                                  0x000074c1
0227 #endif