nvhw/class/clc37b.h

0001 /*
0002  * Copyright (c) 1993-2017, NVIDIA CORPORATION. All rights reserved.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
0018  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0019  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
0020  * DEALINGS IN THE SOFTWARE.
0021  */
0022
0023
0024 #ifndef _clC37b_h_
0025 #define _clC37b_h_
0026
0027 // dma opcode instructions
0028 #define NVC37B_DMA
0029 #define NVC37B_DMA_OPCODE                                                        31:29
0030 #define NVC37B_DMA_OPCODE_METHOD                                            0x00000000
0031 #define NVC37B_DMA_OPCODE_JUMP                                              0x00000001
0032 #define NVC37B_DMA_OPCODE_NONINC_METHOD                                     0x00000002
0033 #define NVC37B_DMA_OPCODE_SET_SUBDEVICE_MASK                                0x00000003
0034 #define NVC37B_DMA_METHOD_COUNT                                                  27:18
0035 #define NVC37B_DMA_METHOD_OFFSET                                                  13:2
0036 #define NVC37B_DMA_DATA                                                           31:0
0037 #define NVC37B_DMA_DATA_NOP                                                 0x00000000
0038 #define NVC37B_DMA_JUMP_OFFSET                                                    11:2
0039 #define NVC37B_DMA_SET_SUBDEVICE_MASK_VALUE                                       11:0
0040
0041 // class methods
0042 #define NVC37B_UPDATE                                                           (0x00000200)
0043 #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW                                     1:1
0044 #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_DISABLE                             (0x00000000)
0045 #define NVC37B_UPDATE_INTERLOCK_WITH_WINDOW_ENABLE                              (0x00000001)
0046 #define NVC37B_SET_POINT_OUT(b)                                                 (0x00000208 + (b)*0x00000004)
0047 #define NVC37B_SET_POINT_OUT_X                                                  15:0
0048 #define NVC37B_SET_POINT_OUT_Y                                                  31:16
0049 #endif // _clC37b_h