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0022 #include "head.h"
0023 #include "core.h"
0024
0025 #include <nvif/push507c.h>
0026
0027 #include <nvhw/class/cl827d.h>
0028
0029 static int
0030 head827d_curs_clr(struct nv50_head *head)
0031 {
0032 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
0033 const int i = head->base.index;
0034 int ret;
0035
0036 if ((ret = PUSH_WAIT(push, 4)))
0037 return ret;
0038
0039 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),
0040 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
0041 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) |
0042 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64));
0043
0044 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000);
0045 return 0;
0046 }
0047
0048 static int
0049 head827d_curs_set(struct nv50_head *head, struct nv50_head_atom *asyh)
0050 {
0051 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
0052 const int i = head->base.index;
0053 int ret;
0054
0055 if ((ret = PUSH_WAIT(push, 5)))
0056 return ret;
0057
0058 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),
0059 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, ENABLE) |
0060 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) |
0061 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) |
0062 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) |
0063 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) |
0064 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, COMPOSITION, ALPHA_BLEND) |
0065 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SUB_OWNER, NONE),
0066
0067 HEAD_SET_OFFSET_CURSOR(i), asyh->curs.offset >> 8);
0068
0069 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle);
0070 return 0;
0071 }
0072
0073 static int
0074 head827d_core_set(struct nv50_head *head, struct nv50_head_atom *asyh)
0075 {
0076 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
0077 const int i = head->base.index;
0078 int ret;
0079
0080 if ((ret = PUSH_WAIT(push, 9)))
0081 return ret;
0082
0083 PUSH_MTHD(push, NV827D, HEAD_SET_OFFSET(i, 0),
0084 NVVAL(NV827D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8));
0085
0086 PUSH_MTHD(push, NV827D, HEAD_SET_SIZE(i),
0087 NVVAL(NV827D, HEAD_SET_SIZE, WIDTH, asyh->core.w) |
0088 NVVAL(NV827D, HEAD_SET_SIZE, HEIGHT, asyh->core.h),
0089
0090 HEAD_SET_STORAGE(i),
0091 NVVAL(NV827D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) |
0092 NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) |
0093 NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) |
0094 NVVAL(NV827D, HEAD_SET_STORAGE, MEMORY_LAYOUT, asyh->core.layout),
0095
0096 HEAD_SET_PARAMS(i),
0097 NVVAL(NV827D, HEAD_SET_PARAMS, FORMAT, asyh->core.format) |
0098 NVDEF(NV827D, HEAD_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
0099 NVDEF(NV827D, HEAD_SET_PARAMS, GAMMA, LINEAR),
0100
0101 HEAD_SET_CONTEXT_DMAS_ISO(i, 0),
0102 NVVAL(NV827D, HEAD_SET_CONTEXT_DMAS_ISO, HANDLE, asyh->core.handle));
0103
0104 PUSH_MTHD(push, NV827D, HEAD_SET_VIEWPORT_POINT_IN(i, 0),
0105 NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, X, asyh->core.x) |
0106 NVVAL(NV827D, HEAD_SET_VIEWPORT_POINT_IN, Y, asyh->core.y));
0107 return 0;
0108 }
0109
0110 static int
0111 head827d_olut_clr(struct nv50_head *head)
0112 {
0113 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
0114 const int i = head->base.index;
0115 int ret;
0116
0117 if ((ret = PUSH_WAIT(push, 4)))
0118 return ret;
0119
0120 PUSH_MTHD(push, NV827D, HEAD_SET_BASE_LUT_LO(i),
0121 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, DISABLE));
0122
0123 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_LUT(i), 0x00000000);
0124 return 0;
0125 }
0126
0127 static int
0128 head827d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
0129 {
0130 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
0131 const int i = head->base.index;
0132 int ret;
0133
0134 if ((ret = PUSH_WAIT(push, 5)))
0135 return ret;
0136
0137 PUSH_MTHD(push, NV827D, HEAD_SET_BASE_LUT_LO(i),
0138 NVDEF(NV827D, HEAD_SET_BASE_LUT_LO, ENABLE, ENABLE) |
0139 NVVAL(NV827D, HEAD_SET_BASE_LUT_LO, MODE, asyh->olut.mode) |
0140 NVVAL(NV827D, HEAD_SET_BASE_LUT_LO, ORIGIN, 0),
0141
0142 HEAD_SET_BASE_LUT_HI(i),
0143 NVVAL(NV827D, HEAD_SET_BASE_LUT_HI, ORIGIN, asyh->olut.offset >> 8));
0144
0145 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_LUT(i), asyh->olut.handle);
0146 return 0;
0147 }
0148
0149 const struct nv50_head_func
0150 head827d = {
0151 .view = head507d_view,
0152 .mode = head507d_mode,
0153 .olut = head507d_olut,
0154 .olut_size = 256,
0155 .olut_set = head827d_olut_set,
0156 .olut_clr = head827d_olut_clr,
0157 .core_calc = head507d_core_calc,
0158 .core_set = head827d_core_set,
0159 .core_clr = head507d_core_clr,
0160 .curs_layout = head507d_curs_layout,
0161 .curs_format = head507d_curs_format,
0162 .curs_set = head827d_curs_set,
0163 .curs_clr = head827d_curs_clr,
0164 .base = head507d_base,
0165 .ovly = head507d_ovly,
0166 .dither = head507d_dither,
0167 .procamp = head507d_procamp,
0168 };