0001 #ifndef __NV50_KMS_ATOM_H__
0002 #define __NV50_KMS_ATOM_H__
0003 #define nv50_atom(p) container_of((p), struct nv50_atom, state)
0004 #include <drm/drm_atomic.h>
0005 #include "crc.h"
0006
0007 struct nouveau_encoder;
0008
0009 struct nv50_atom {
0010 struct drm_atomic_state state;
0011
0012 struct list_head outp;
0013 bool lock_core;
0014 bool flush_disable;
0015 };
0016
0017 #define nv50_head_atom(p) container_of((p), struct nv50_head_atom, state)
0018
0019 struct nv50_head_atom {
0020 struct drm_crtc_state state;
0021
0022 struct {
0023 u32 mask;
0024 u32 owned;
0025 u32 olut;
0026 } wndw;
0027
0028 struct {
0029 u16 iW;
0030 u16 iH;
0031 u16 oW;
0032 u16 oH;
0033 } view;
0034
0035 struct nv50_head_mode {
0036 bool interlace;
0037 u32 clock;
0038 struct {
0039 u16 active;
0040 u16 synce;
0041 u16 blanke;
0042 u16 blanks;
0043 } h;
0044 struct {
0045 u32 active;
0046 u16 synce;
0047 u16 blanke;
0048 u16 blanks;
0049 u16 blank2s;
0050 u16 blank2e;
0051 u16 blankus;
0052 } v;
0053 } mode;
0054
0055 struct {
0056 bool visible;
0057 u32 handle;
0058 u64 offset:40;
0059 u8 buffer:1;
0060 u8 mode:4;
0061 u16 size:11;
0062 u8 range:2;
0063 u8 output_mode:2;
0064 void (*load)(struct drm_color_lut *, int size, void __iomem *);
0065 } olut;
0066
0067 struct {
0068 bool visible;
0069 u32 handle;
0070 u64 offset:40;
0071 u8 format;
0072 u8 kind:7;
0073 u8 layout:1;
0074 u8 blockh:4;
0075 u16 blocks:12;
0076 u32 pitch:20;
0077 u16 x;
0078 u16 y;
0079 u16 w;
0080 u16 h;
0081 } core;
0082
0083 struct {
0084 bool visible;
0085 u32 handle;
0086 u64 offset:40;
0087 u8 layout:2;
0088 u8 format:8;
0089 } curs;
0090
0091 struct {
0092 u8 depth;
0093 u8 cpp;
0094 u16 x;
0095 u16 y;
0096 u16 w;
0097 u16 h;
0098 } base;
0099
0100 struct {
0101 u8 cpp;
0102 } ovly;
0103
0104 struct {
0105 bool enable:1;
0106 u8 bits:2;
0107 u8 mode:4;
0108 } dither;
0109
0110 struct {
0111 struct {
0112 u16 cos:12;
0113 u16 sin:12;
0114 } sat;
0115 } procamp;
0116
0117 struct {
0118 u8 nhsync:1;
0119 u8 nvsync:1;
0120 u8 depth:4;
0121 u8 crc_raster:2;
0122 u8 bpc;
0123 } or;
0124
0125 struct nv50_crc_atom crc;
0126
0127
0128 struct {
0129 int pbn;
0130 u8 tu:6;
0131 } dp;
0132
0133 union nv50_head_atom_mask {
0134 struct {
0135 bool olut:1;
0136 bool core:1;
0137 bool curs:1;
0138 bool view:1;
0139 bool mode:1;
0140 bool base:1;
0141 bool ovly:1;
0142 bool dither:1;
0143 bool procamp:1;
0144 bool crc:1;
0145 bool or:1;
0146 };
0147 u16 mask;
0148 } set, clr;
0149 };
0150
0151 static inline struct nv50_head_atom *
0152 nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc)
0153 {
0154 struct drm_crtc_state *statec = drm_atomic_get_crtc_state(state, crtc);
0155 if (IS_ERR(statec))
0156 return (void *)statec;
0157 return nv50_head_atom(statec);
0158 }
0159
0160 static inline struct drm_encoder *
0161 nv50_head_atom_get_encoder(struct nv50_head_atom *atom)
0162 {
0163 struct drm_encoder *encoder;
0164
0165
0166 drm_for_each_encoder_mask(encoder, atom->state.crtc->dev,
0167 atom->state.encoder_mask)
0168 return encoder;
0169
0170 return NULL;
0171 }
0172
0173 #define nv50_wndw_atom(p) container_of((p), struct nv50_wndw_atom, state)
0174
0175 struct nv50_wndw_atom {
0176 struct drm_plane_state state;
0177
0178 struct drm_property_blob *ilut;
0179 bool visible;
0180
0181 struct {
0182 u32 handle;
0183 u16 offset:12;
0184 bool awaken:1;
0185 } ntfy;
0186
0187 struct {
0188 u32 handle;
0189 u16 offset:12;
0190 u32 acquire;
0191 u32 release;
0192 } sema;
0193
0194 struct {
0195 u32 handle;
0196 struct {
0197 u64 offset:40;
0198 u8 buffer:1;
0199 u8 enable:2;
0200 u8 mode:4;
0201 u16 size:11;
0202 u8 range:2;
0203 u8 output_mode:2;
0204 void (*load)(struct drm_color_lut *, int size,
0205 void __iomem *);
0206 } i;
0207 } xlut;
0208
0209 struct {
0210 u32 matrix[12];
0211 bool valid;
0212 } csc;
0213
0214 struct {
0215 u8 mode:2;
0216 u8 interval:4;
0217
0218 u8 colorspace:2;
0219 u8 format;
0220 u8 kind:7;
0221 u8 layout:1;
0222 u8 blockh:4;
0223 u16 blocks[3];
0224 u32 pitch[3];
0225 u16 w;
0226 u16 h;
0227
0228 u32 handle[6];
0229 u64 offset[6];
0230 } image;
0231
0232 struct {
0233 u16 sx;
0234 u16 sy;
0235 u16 sw;
0236 u16 sh;
0237 u16 dw;
0238 u16 dh;
0239 } scale;
0240
0241 struct {
0242 u16 x;
0243 u16 y;
0244 } point;
0245
0246 struct {
0247 u8 depth;
0248 u8 k1;
0249 u8 src_color:4;
0250 u8 dst_color:4;
0251 } blend;
0252
0253 union nv50_wndw_atom_mask {
0254 struct {
0255 bool ntfy:1;
0256 bool sema:1;
0257 bool xlut:1;
0258 bool csc:1;
0259 bool image:1;
0260 bool scale:1;
0261 bool point:1;
0262 bool blend:1;
0263 };
0264 u8 mask;
0265 } set, clr;
0266 };
0267 #endif
