msm/hdmi/hdmi_i2c.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2013 Red Hat
0004  * Author: Rob Clark <robdclark@gmail.com>
0005  */
0006
0007 #include "hdmi.h"
0008
0009 struct hdmi_i2c_adapter {
0010     struct i2c_adapter base;
0011     struct hdmi *hdmi;
0012     bool sw_done;
0013     wait_queue_head_t ddc_event;
0014 };
0015 #define to_hdmi_i2c_adapter(x) container_of(x, struct hdmi_i2c_adapter, base)
0016
0017 static void init_ddc(struct hdmi_i2c_adapter *hdmi_i2c)
0018 {
0019     struct hdmi *hdmi = hdmi_i2c->hdmi;
0020
0021     hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
0022             HDMI_DDC_CTRL_SW_STATUS_RESET);
0023     hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
0024             HDMI_DDC_CTRL_SOFT_RESET);
0025
0026     hdmi_write(hdmi, REG_HDMI_DDC_SPEED,
0027             HDMI_DDC_SPEED_THRESHOLD(2) |
0028             HDMI_DDC_SPEED_PRESCALE(10));
0029
0030     hdmi_write(hdmi, REG_HDMI_DDC_SETUP,
0031             HDMI_DDC_SETUP_TIMEOUT(0xff));
0032
0033     /* enable reference timer for 27us */
0034     hdmi_write(hdmi, REG_HDMI_DDC_REF,
0035             HDMI_DDC_REF_REFTIMER_ENABLE |
0036             HDMI_DDC_REF_REFTIMER(27));
0037 }
0038
0039 static int ddc_clear_irq(struct hdmi_i2c_adapter *hdmi_i2c)
0040 {
0041     struct hdmi *hdmi = hdmi_i2c->hdmi;
0042     struct drm_device *dev = hdmi->dev;
0043     uint32_t retry = 0xffff;
0044     uint32_t ddc_int_ctrl;
0045
0046     do {
0047         --retry;
0048
0049         hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
0050                 HDMI_DDC_INT_CTRL_SW_DONE_ACK |
0051                 HDMI_DDC_INT_CTRL_SW_DONE_MASK);
0052
0053         ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
0054
0055     } while ((ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_INT) && retry);
0056
0057     if (!retry) {
0058         DRM_DEV_ERROR(dev->dev, "timeout waiting for DDC\n");
0059         return -ETIMEDOUT;
0060     }
0061
0062     hdmi_i2c->sw_done = false;
0063
0064     return 0;
0065 }
0066
0067 #define MAX_TRANSACTIONS 4
0068
0069 static bool sw_done(struct hdmi_i2c_adapter *hdmi_i2c)
0070 {
0071     struct hdmi *hdmi = hdmi_i2c->hdmi;
0072
0073     if (!hdmi_i2c->sw_done) {
0074         uint32_t ddc_int_ctrl;
0075
0076         ddc_int_ctrl = hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL);
0077
0078         if ((ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_MASK) &&
0079                 (ddc_int_ctrl & HDMI_DDC_INT_CTRL_SW_DONE_INT)) {
0080             hdmi_i2c->sw_done = true;
0081             hdmi_write(hdmi, REG_HDMI_DDC_INT_CTRL,
0082                     HDMI_DDC_INT_CTRL_SW_DONE_ACK);
0083         }
0084     }
0085
0086     return hdmi_i2c->sw_done;
0087 }
0088
0089 static int msm_hdmi_i2c_xfer(struct i2c_adapter *i2c,
0090         struct i2c_msg *msgs, int num)
0091 {
0092     struct hdmi_i2c_adapter *hdmi_i2c = to_hdmi_i2c_adapter(i2c);
0093     struct hdmi *hdmi = hdmi_i2c->hdmi;
0094     struct drm_device *dev = hdmi->dev;
0095     static const uint32_t nack[] = {
0096             HDMI_DDC_SW_STATUS_NACK0, HDMI_DDC_SW_STATUS_NACK1,
0097             HDMI_DDC_SW_STATUS_NACK2, HDMI_DDC_SW_STATUS_NACK3,
0098     };
0099     int indices[MAX_TRANSACTIONS];
0100     int ret, i, j, index = 0;
0101     uint32_t ddc_status, ddc_data, i2c_trans;
0102
0103     num = min(num, MAX_TRANSACTIONS);
0104
0105     WARN_ON(!(hdmi_read(hdmi, REG_HDMI_CTRL) & HDMI_CTRL_ENABLE));
0106
0107     if (num == 0)
0108         return num;
0109
0110     init_ddc(hdmi_i2c);
0111
0112     ret = ddc_clear_irq(hdmi_i2c);
0113     if (ret)
0114         return ret;
0115
0116     for (i = 0; i < num; i++) {
0117         struct i2c_msg *p = &msgs[i];
0118         uint32_t raw_addr = p->addr << 1;
0119
0120         if (p->flags & I2C_M_RD)
0121             raw_addr |= 1;
0122
0123         ddc_data = HDMI_DDC_DATA_DATA(raw_addr) |
0124                 HDMI_DDC_DATA_DATA_RW(DDC_WRITE);
0125
0126         if (i == 0) {
0127             ddc_data |= HDMI_DDC_DATA_INDEX(0) |
0128                     HDMI_DDC_DATA_INDEX_WRITE;
0129         }
0130
0131         hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
0132         index++;
0133
0134         indices[i] = index;
0135
0136         if (p->flags & I2C_M_RD) {
0137             index += p->len;
0138         } else {
0139             for (j = 0; j < p->len; j++) {
0140                 ddc_data = HDMI_DDC_DATA_DATA(p->buf[j]) |
0141                         HDMI_DDC_DATA_DATA_RW(DDC_WRITE);
0142                 hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
0143                 index++;
0144             }
0145         }
0146
0147         i2c_trans = HDMI_I2C_TRANSACTION_REG_CNT(p->len) |
0148                 HDMI_I2C_TRANSACTION_REG_RW(
0149                         (p->flags & I2C_M_RD) ? DDC_READ : DDC_WRITE) |
0150                 HDMI_I2C_TRANSACTION_REG_START;
0151
0152         if (i == (num - 1))
0153             i2c_trans |= HDMI_I2C_TRANSACTION_REG_STOP;
0154
0155         hdmi_write(hdmi, REG_HDMI_I2C_TRANSACTION(i), i2c_trans);
0156     }
0157
0158     /* trigger the transfer: */
0159     hdmi_write(hdmi, REG_HDMI_DDC_CTRL,
0160             HDMI_DDC_CTRL_TRANSACTION_CNT(num - 1) |
0161             HDMI_DDC_CTRL_GO);
0162
0163     ret = wait_event_timeout(hdmi_i2c->ddc_event, sw_done(hdmi_i2c), HZ/4);
0164     if (ret <= 0) {
0165         if (ret == 0)
0166             ret = -ETIMEDOUT;
0167         dev_warn(dev->dev, "DDC timeout: %d\n", ret);
0168         DBG("sw_status=%08x, hw_status=%08x, int_ctrl=%08x",
0169                 hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS),
0170                 hdmi_read(hdmi, REG_HDMI_DDC_HW_STATUS),
0171                 hdmi_read(hdmi, REG_HDMI_DDC_INT_CTRL));
0172         return ret;
0173     }
0174
0175     ddc_status = hdmi_read(hdmi, REG_HDMI_DDC_SW_STATUS);
0176
0177     /* read back results of any read transactions: */
0178     for (i = 0; i < num; i++) {
0179         struct i2c_msg *p = &msgs[i];
0180
0181         if (!(p->flags & I2C_M_RD))
0182             continue;
0183
0184         /* check for NACK: */
0185         if (ddc_status & nack[i]) {
0186             DBG("ddc_status=%08x", ddc_status);
0187             break;
0188         }
0189
0190         ddc_data = HDMI_DDC_DATA_DATA_RW(DDC_READ) |
0191                 HDMI_DDC_DATA_INDEX(indices[i]) |
0192                 HDMI_DDC_DATA_INDEX_WRITE;
0193
0194         hdmi_write(hdmi, REG_HDMI_DDC_DATA, ddc_data);
0195
0196         /* discard first byte: */
0197         hdmi_read(hdmi, REG_HDMI_DDC_DATA);
0198
0199         for (j = 0; j < p->len; j++) {
0200             ddc_data = hdmi_read(hdmi, REG_HDMI_DDC_DATA);
0201             p->buf[j] = FIELD(ddc_data, HDMI_DDC_DATA_DATA);
0202         }
0203     }
0204
0205     return i;
0206 }
0207
0208 static u32 msm_hdmi_i2c_func(struct i2c_adapter *adapter)
0209 {
0210     return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
0211 }
0212
0213 static const struct i2c_algorithm msm_hdmi_i2c_algorithm = {
0214     .master_xfer    = msm_hdmi_i2c_xfer,
0215     .functionality  = msm_hdmi_i2c_func,
0216 };
0217
0218 void msm_hdmi_i2c_irq(struct i2c_adapter *i2c)
0219 {
0220     struct hdmi_i2c_adapter *hdmi_i2c = to_hdmi_i2c_adapter(i2c);
0221
0222     if (sw_done(hdmi_i2c))
0223         wake_up_all(&hdmi_i2c->ddc_event);
0224 }
0225
0226 void msm_hdmi_i2c_destroy(struct i2c_adapter *i2c)
0227 {
0228     struct hdmi_i2c_adapter *hdmi_i2c = to_hdmi_i2c_adapter(i2c);
0229     i2c_del_adapter(i2c);
0230     kfree(hdmi_i2c);
0231 }
0232
0233 struct i2c_adapter *msm_hdmi_i2c_init(struct hdmi *hdmi)
0234 {
0235     struct hdmi_i2c_adapter *hdmi_i2c;
0236     struct i2c_adapter *i2c = NULL;
0237     int ret;
0238
0239     hdmi_i2c = kzalloc(sizeof(*hdmi_i2c), GFP_KERNEL);
0240     if (!hdmi_i2c) {
0241         ret = -ENOMEM;
0242         goto fail;
0243     }
0244
0245     i2c = &hdmi_i2c->base;
0246
0247     hdmi_i2c->hdmi = hdmi;
0248     init_waitqueue_head(&hdmi_i2c->ddc_event);
0249
0250
0251     i2c->owner = THIS_MODULE;
0252     i2c->class = I2C_CLASS_DDC;
0253     snprintf(i2c->name, sizeof(i2c->name), "msm hdmi i2c");
0254     i2c->dev.parent = &hdmi->pdev->dev;
0255     i2c->algo = &msm_hdmi_i2c_algorithm;
0256
0257     ret = i2c_add_adapter(i2c);
0258     if (ret)
0259         goto fail;
0260
0261     return i2c;
0262
0263 fail:
0264     if (i2c)
0265         msm_hdmi_i2c_destroy(i2c);
0266     return ERR_PTR(ret);
0267 }