msm/dsi/dsi_cfg.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
0004  */
0005
0006 #include "dsi_cfg.h"
0007
0008 static const char * const dsi_v2_bus_clk_names[] = {
0009     "core_mmss", "iface", "bus",
0010 };
0011
0012 static const struct msm_dsi_config apq8064_dsi_cfg = {
0013     .io_offset = 0,
0014     .reg_cfg = {
0015         .num = 3,
0016         .regs = {
0017             {"vdda", 100000, 100},  /* 1.2 V */
0018             {"avdd", 10000, 100},   /* 3.0 V */
0019             {"vddio", 100000, 100}, /* 1.8 V */
0020         },
0021     },
0022     .bus_clk_names = dsi_v2_bus_clk_names,
0023     .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
0024     .io_start = { 0x4700000, 0x5800000 },
0025     .num_dsi = 2,
0026 };
0027
0028 static const char * const dsi_6g_bus_clk_names[] = {
0029     "mdp_core", "iface", "bus", "core_mmss",
0030 };
0031
0032 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
0033     .io_offset = DSI_6G_REG_SHIFT,
0034     .reg_cfg = {
0035         .num = 3,
0036         .regs = {
0037             {"vdd", 150000, 100},   /* 3.0 V */
0038             {"vdda", 100000, 100},  /* 1.2 V */
0039             {"vddio", 100000, 100}, /* 1.8 V */
0040         },
0041     },
0042     .bus_clk_names = dsi_6g_bus_clk_names,
0043     .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
0044     .io_start = { 0xfd922800, 0xfd922b00 },
0045     .num_dsi = 2,
0046 };
0047
0048 static const char * const dsi_8916_bus_clk_names[] = {
0049     "mdp_core", "iface", "bus",
0050 };
0051
0052 static const struct msm_dsi_config msm8916_dsi_cfg = {
0053     .io_offset = DSI_6G_REG_SHIFT,
0054     .reg_cfg = {
0055         .num = 2,
0056         .regs = {
0057             {"vdda", 100000, 100},  /* 1.2 V */
0058             {"vddio", 100000, 100}, /* 1.8 V */
0059         },
0060     },
0061     .bus_clk_names = dsi_8916_bus_clk_names,
0062     .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
0063     .io_start = { 0x1a98000 },
0064     .num_dsi = 1,
0065 };
0066
0067 static const char * const dsi_8976_bus_clk_names[] = {
0068     "mdp_core", "iface", "bus",
0069 };
0070
0071 static const struct msm_dsi_config msm8976_dsi_cfg = {
0072     .io_offset = DSI_6G_REG_SHIFT,
0073     .reg_cfg = {
0074         .num = 2,
0075         .regs = {
0076             {"vdda", 100000, 100},  /* 1.2 V */
0077             {"vddio", 100000, 100}, /* 1.8 V */
0078         },
0079     },
0080     .bus_clk_names = dsi_8976_bus_clk_names,
0081     .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
0082     .io_start = { 0x1a94000, 0x1a96000 },
0083     .num_dsi = 2,
0084 };
0085
0086 static const struct msm_dsi_config msm8994_dsi_cfg = {
0087     .io_offset = DSI_6G_REG_SHIFT,
0088     .reg_cfg = {
0089         .num = 6,
0090         .regs = {
0091             {"vdda", 100000, 100},  /* 1.25 V */
0092             {"vddio", 100000, 100}, /* 1.8 V */
0093             {"vcca", 10000, 100},   /* 1.0 V */
0094             {"vdd", 100000, 100},   /* 1.8 V */
0095             {"lab_reg", -1, -1},
0096             {"ibb_reg", -1, -1},
0097         },
0098     },
0099     .bus_clk_names = dsi_6g_bus_clk_names,
0100     .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
0101     .io_start = { 0xfd998000, 0xfd9a0000 },
0102     .num_dsi = 2,
0103 };
0104
0105 static const char * const dsi_8996_bus_clk_names[] = {
0106     "mdp_core", "iface", "bus", "core_mmss",
0107 };
0108
0109 static const struct msm_dsi_config msm8996_dsi_cfg = {
0110     .io_offset = DSI_6G_REG_SHIFT,
0111     .reg_cfg = {
0112         .num = 3,
0113         .regs = {
0114             {"vdda", 18160, 1 },    /* 1.25 V */
0115             {"vcca", 17000, 32 },   /* 0.925 V */
0116             {"vddio", 100000, 100 },/* 1.8 V */
0117         },
0118     },
0119     .bus_clk_names = dsi_8996_bus_clk_names,
0120     .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
0121     .io_start = { 0x994000, 0x996000 },
0122     .num_dsi = 2,
0123 };
0124
0125 static const char * const dsi_msm8998_bus_clk_names[] = {
0126     "iface", "bus", "core",
0127 };
0128
0129 static const struct msm_dsi_config msm8998_dsi_cfg = {
0130     .io_offset = DSI_6G_REG_SHIFT,
0131     .reg_cfg = {
0132         .num = 2,
0133         .regs = {
0134             {"vdd", 367000, 16 },   /* 0.9 V */
0135             {"vdda", 62800, 2 },    /* 1.2 V */
0136         },
0137     },
0138     .bus_clk_names = dsi_msm8998_bus_clk_names,
0139     .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
0140     .io_start = { 0xc994000, 0xc996000 },
0141     .num_dsi = 2,
0142 };
0143
0144 static const char * const dsi_sdm660_bus_clk_names[] = {
0145     "iface", "bus", "core", "core_mmss",
0146 };
0147
0148 static const struct msm_dsi_config sdm660_dsi_cfg = {
0149     .io_offset = DSI_6G_REG_SHIFT,
0150     .reg_cfg = {
0151         .num = 1,
0152         .regs = {
0153             {"vdda", 12560, 4 },    /* 1.2 V */
0154         },
0155     },
0156     .bus_clk_names = dsi_sdm660_bus_clk_names,
0157     .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names),
0158     .io_start = { 0xc994000, 0xc996000 },
0159     .num_dsi = 2,
0160 };
0161
0162 static const char * const dsi_sdm845_bus_clk_names[] = {
0163     "iface", "bus",
0164 };
0165
0166 static const char * const dsi_sc7180_bus_clk_names[] = {
0167     "iface", "bus",
0168 };
0169
0170 static const struct msm_dsi_config sdm845_dsi_cfg = {
0171     .io_offset = DSI_6G_REG_SHIFT,
0172     .reg_cfg = {
0173         .num = 1,
0174         .regs = {
0175             {"vdda", 21800, 4 },    /* 1.2 V */
0176         },
0177     },
0178     .bus_clk_names = dsi_sdm845_bus_clk_names,
0179     .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
0180     .io_start = { 0xae94000, 0xae96000 },
0181     .num_dsi = 2,
0182 };
0183
0184 static const struct msm_dsi_config sc7180_dsi_cfg = {
0185     .io_offset = DSI_6G_REG_SHIFT,
0186     .reg_cfg = {
0187         .num = 1,
0188         .regs = {
0189             {"vdda", 21800, 4 },    /* 1.2 V */
0190         },
0191     },
0192     .bus_clk_names = dsi_sc7180_bus_clk_names,
0193     .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
0194     .io_start = { 0xae94000 },
0195     .num_dsi = 1,
0196 };
0197
0198 static const char * const dsi_sc7280_bus_clk_names[] = {
0199     "iface", "bus",
0200 };
0201
0202 static const struct msm_dsi_config sc7280_dsi_cfg = {
0203     .io_offset = DSI_6G_REG_SHIFT,
0204     .reg_cfg = {
0205         .num = 1,
0206         .regs = {
0207             {"vdda", 8350, 0 }, /* 1.2 V */
0208         },
0209     },
0210     .bus_clk_names = dsi_sc7280_bus_clk_names,
0211     .num_bus_clks = ARRAY_SIZE(dsi_sc7280_bus_clk_names),
0212     .io_start = { 0xae94000 },
0213     .num_dsi = 1,
0214 };
0215
0216 static const char * const dsi_qcm2290_bus_clk_names[] = {
0217     "iface", "bus",
0218 };
0219
0220 static const struct msm_dsi_config qcm2290_dsi_cfg = {
0221     .io_offset = DSI_6G_REG_SHIFT,
0222     .reg_cfg = {
0223         .num = 1,
0224         .regs = {
0225             {"vdda", 21800, 4 },    /* 1.2 V */
0226         },
0227     },
0228     .bus_clk_names = dsi_qcm2290_bus_clk_names,
0229     .num_bus_clks = ARRAY_SIZE(dsi_qcm2290_bus_clk_names),
0230     .io_start = { 0x5e94000 },
0231     .num_dsi = 1,
0232 };
0233
0234 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
0235     .link_clk_set_rate = dsi_link_clk_set_rate_v2,
0236     .link_clk_enable = dsi_link_clk_enable_v2,
0237     .link_clk_disable = dsi_link_clk_disable_v2,
0238     .clk_init_ver = dsi_clk_init_v2,
0239     .tx_buf_alloc = dsi_tx_buf_alloc_v2,
0240     .tx_buf_get = dsi_tx_buf_get_v2,
0241     .tx_buf_put = NULL,
0242     .dma_base_get = dsi_dma_base_get_v2,
0243     .calc_clk_rate = dsi_calc_clk_rate_v2,
0244 };
0245
0246 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
0247     .link_clk_set_rate = dsi_link_clk_set_rate_6g,
0248     .link_clk_enable = dsi_link_clk_enable_6g,
0249     .link_clk_disable = dsi_link_clk_disable_6g,
0250     .clk_init_ver = NULL,
0251     .tx_buf_alloc = dsi_tx_buf_alloc_6g,
0252     .tx_buf_get = dsi_tx_buf_get_6g,
0253     .tx_buf_put = dsi_tx_buf_put_6g,
0254     .dma_base_get = dsi_dma_base_get_6g,
0255     .calc_clk_rate = dsi_calc_clk_rate_6g,
0256 };
0257
0258 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
0259     .link_clk_set_rate = dsi_link_clk_set_rate_6g,
0260     .link_clk_enable = dsi_link_clk_enable_6g,
0261     .link_clk_disable = dsi_link_clk_disable_6g,
0262     .clk_init_ver = dsi_clk_init_6g_v2,
0263     .tx_buf_alloc = dsi_tx_buf_alloc_6g,
0264     .tx_buf_get = dsi_tx_buf_get_6g,
0265     .tx_buf_put = dsi_tx_buf_put_6g,
0266     .dma_base_get = dsi_dma_base_get_6g,
0267     .calc_clk_rate = dsi_calc_clk_rate_6g,
0268 };
0269
0270 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
0271     {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
0272         &apq8064_dsi_cfg, &msm_dsi_v2_host_ops},
0273     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
0274         &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
0275     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
0276         &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
0277     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
0278         &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
0279     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
0280         &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
0281     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
0282         &msm8994_dsi_cfg, &msm_dsi_6g_host_ops},
0283     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
0284         &msm8916_dsi_cfg, &msm_dsi_6g_host_ops},
0285     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
0286         &msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
0287     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2,
0288         &msm8976_dsi_cfg, &msm_dsi_6g_host_ops},
0289     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0,
0290         &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0291     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0,
0292         &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0293     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
0294         &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0295     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0,
0296         &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0297     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0,
0298         &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0299     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
0300         &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0301     {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_5_0,
0302         &sc7280_dsi_cfg, &msm_dsi_6g_v2_host_ops},
0303 };
0304
0305 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
0306 {
0307     const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
0308     int i;
0309
0310     for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
0311         if ((dsi_cfg_handlers[i].major == major) &&
0312             (dsi_cfg_handlers[i].minor == minor)) {
0313             cfg_hnd = &dsi_cfg_handlers[i];
0314             break;
0315         }
0316     }
0317
0318     return cfg_hnd;
0319 }
0320
0321 /*  Non autodetect configs */
0322 const struct msm_dsi_cfg_handler qcm2290_dsi_cfg_handler = {
0323     .cfg = &qcm2290_dsi_cfg,
0324     .ops = &msm_dsi_6g_v2_host_ops,
0325 };