msm/disp/mdp_kms.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2013 Red Hat
0004  * Author: Rob Clark <robdclark@gmail.com>
0005  */
0006
0007 #ifndef __MDP_KMS_H__
0008 #define __MDP_KMS_H__
0009
0010 #include <linux/clk.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/regulator/consumer.h>
0013
0014 #include "msm_drv.h"
0015 #include "msm_kms.h"
0016 #include "mdp_common.xml.h"
0017
0018 struct mdp_kms;
0019
0020 struct mdp_kms_funcs {
0021     struct msm_kms_funcs base;
0022     void (*set_irqmask)(struct mdp_kms *mdp_kms, uint32_t irqmask,
0023         uint32_t old_irqmask);
0024 };
0025
0026 struct mdp_kms {
0027     struct msm_kms base;
0028
0029     const struct mdp_kms_funcs *funcs;
0030
0031     /* irq handling: */
0032     bool in_irq;
0033     struct list_head irq_list;    /* list of mdp4_irq */
0034     uint32_t vblank_mask;         /* irq bits set for userspace vblank */
0035     uint32_t cur_irq_mask;        /* current irq mask */
0036 };
0037 #define to_mdp_kms(x) container_of(x, struct mdp_kms, base)
0038
0039 static inline int mdp_kms_init(struct mdp_kms *mdp_kms,
0040         const struct mdp_kms_funcs *funcs)
0041 {
0042     mdp_kms->funcs = funcs;
0043     INIT_LIST_HEAD(&mdp_kms->irq_list);
0044     return msm_kms_init(&mdp_kms->base, &funcs->base);
0045 }
0046
0047 static inline void mdp_kms_destroy(struct mdp_kms *mdp_kms)
0048 {
0049     msm_kms_destroy(&mdp_kms->base);
0050 }
0051
0052 /*
0053  * irq helpers:
0054  */
0055
0056 /* For transiently registering for different MDP irqs that various parts
0057  * of the KMS code need during setup/configuration.  These are not
0058  * necessarily the same as what drm_vblank_get/put() are requesting, and
0059  * the hysteresis in drm_vblank_put() is not necessarily desirable for
0060  * internal housekeeping related irq usage.
0061  */
0062 struct mdp_irq {
0063     struct list_head node;
0064     uint32_t irqmask;
0065     bool registered;
0066     void (*irq)(struct mdp_irq *irq, uint32_t irqstatus);
0067 };
0068
0069 void mdp_dispatch_irqs(struct mdp_kms *mdp_kms, uint32_t status);
0070 void mdp_update_vblank_mask(struct mdp_kms *mdp_kms, uint32_t mask, bool enable);
0071 void mdp_irq_wait(struct mdp_kms *mdp_kms, uint32_t irqmask);
0072 void mdp_irq_register(struct mdp_kms *mdp_kms, struct mdp_irq *irq);
0073 void mdp_irq_unregister(struct mdp_kms *mdp_kms, struct mdp_irq *irq);
0074 void mdp_irq_update(struct mdp_kms *mdp_kms);
0075
0076 /*
0077  * pixel format helpers:
0078  */
0079
0080 struct mdp_format {
0081     struct msm_format base;
0082     enum mdp_bpc bpc_r, bpc_g, bpc_b;
0083     enum mdp_bpc_alpha bpc_a;
0084     uint8_t unpack[4];
0085     bool alpha_enable, unpack_tight;
0086     uint8_t cpp, unpack_count;
0087     enum mdp_fetch_type fetch_type;
0088     enum mdp_chroma_samp_type chroma_sample;
0089     bool is_yuv;
0090 };
0091 #define to_mdp_format(x) container_of(x, struct mdp_format, base)
0092 #define MDP_FORMAT_IS_YUV(mdp_format) ((mdp_format)->is_yuv)
0093
0094 uint32_t mdp_get_formats(uint32_t *formats, uint32_t max_formats, bool rgb_only);
0095 const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format, uint64_t modifier);
0096
0097 /* MDP capabilities */
0098 #define MDP_CAP_SMP     BIT(0)  /* Shared Memory Pool                 */
0099 #define MDP_CAP_DSC     BIT(1)  /* VESA Display Stream Compression    */
0100 #define MDP_CAP_CDM     BIT(2)  /* Chroma Down Module (HDMI 2.0 YUV)  */
0101 #define MDP_CAP_SRC_SPLIT   BIT(3)  /* Source Split of SSPPs */
0102
0103 /* MDP pipe capabilities */
0104 #define MDP_PIPE_CAP_HFLIP          BIT(0)
0105 #define MDP_PIPE_CAP_VFLIP          BIT(1)
0106 #define MDP_PIPE_CAP_SCALE          BIT(2)
0107 #define MDP_PIPE_CAP_CSC            BIT(3)
0108 #define MDP_PIPE_CAP_DECIMATION         BIT(4)
0109 #define MDP_PIPE_CAP_SW_PIX_EXT         BIT(5)
0110 #define MDP_PIPE_CAP_CURSOR         BIT(6)
0111
0112 /* MDP layer mixer caps */
0113 #define MDP_LM_CAP_DISPLAY          BIT(0)
0114 #define MDP_LM_CAP_WB               BIT(1)
0115 #define MDP_LM_CAP_PAIR             BIT(2)
0116
0117 static inline bool pipe_supports_yuv(uint32_t pipe_caps)
0118 {
0119     return (pipe_caps & MDP_PIPE_CAP_SCALE) &&
0120         (pipe_caps & MDP_PIPE_CAP_CSC);
0121 }
0122
0123 enum csc_type {
0124     CSC_RGB2RGB = 0,
0125     CSC_YUV2RGB,
0126     CSC_RGB2YUV,
0127     CSC_YUV2YUV,
0128     CSC_MAX
0129 };
0130
0131 struct csc_cfg {
0132     enum csc_type type;
0133     uint32_t matrix[9];
0134     uint32_t pre_bias[3];
0135     uint32_t post_bias[3];
0136     uint32_t pre_clamp[6];
0137     uint32_t post_clamp[6];
0138 };
0139
0140 struct csc_cfg *mdp_get_default_csc_cfg(enum csc_type);
0141
0142 #endif /* __MDP_KMS_H__ */