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0007 #include <linux/irq.h>
0008
0009 #include <drm/drm_print.h>
0010 #include <drm/drm_vblank.h>
0011
0012 #include "msm_drv.h"
0013 #include "mdp5_kms.h"
0014
0015 void mdp5_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
0016 uint32_t old_irqmask)
0017 {
0018 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_CLEAR,
0019 irqmask ^ (irqmask & old_irqmask));
0020 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_EN, irqmask);
0021 }
0022
0023 static void mdp5_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
0024 {
0025 struct mdp5_kms *mdp5_kms = container_of(irq, struct mdp5_kms, error_handler);
0026 static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1);
0027 extern bool dumpstate;
0028
0029 DRM_ERROR_RATELIMITED("errors: %08x\n", irqstatus);
0030
0031 if (dumpstate && __ratelimit(&rs)) {
0032 struct drm_printer p = drm_info_printer(mdp5_kms->dev->dev);
0033 drm_state_dump(mdp5_kms->dev, &p);
0034 if (mdp5_kms->smp)
0035 mdp5_smp_dump(mdp5_kms->smp, &p);
0036 }
0037 }
0038
0039 void mdp5_irq_preinstall(struct msm_kms *kms)
0040 {
0041 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
0042 struct device *dev = &mdp5_kms->pdev->dev;
0043
0044 pm_runtime_get_sync(dev);
0045 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff);
0046 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
0047 pm_runtime_put_sync(dev);
0048 }
0049
0050 int mdp5_irq_postinstall(struct msm_kms *kms)
0051 {
0052 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
0053 struct mdp5_kms *mdp5_kms = to_mdp5_kms(mdp_kms);
0054 struct device *dev = &mdp5_kms->pdev->dev;
0055 struct mdp_irq *error_handler = &mdp5_kms->error_handler;
0056
0057 error_handler->irq = mdp5_irq_error_handler;
0058 error_handler->irqmask = MDP5_IRQ_INTF0_UNDER_RUN |
0059 MDP5_IRQ_INTF1_UNDER_RUN |
0060 MDP5_IRQ_INTF2_UNDER_RUN |
0061 MDP5_IRQ_INTF3_UNDER_RUN;
0062
0063 pm_runtime_get_sync(dev);
0064 mdp_irq_register(mdp_kms, error_handler);
0065 pm_runtime_put_sync(dev);
0066
0067 return 0;
0068 }
0069
0070 void mdp5_irq_uninstall(struct msm_kms *kms)
0071 {
0072 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
0073 struct device *dev = &mdp5_kms->pdev->dev;
0074
0075 pm_runtime_get_sync(dev);
0076 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
0077 pm_runtime_put_sync(dev);
0078 }
0079
0080 irqreturn_t mdp5_irq(struct msm_kms *kms)
0081 {
0082 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
0083 struct mdp5_kms *mdp5_kms = to_mdp5_kms(mdp_kms);
0084 struct drm_device *dev = mdp5_kms->dev;
0085 struct msm_drm_private *priv = dev->dev_private;
0086 unsigned int id;
0087 uint32_t status, enable;
0088
0089 enable = mdp5_read(mdp5_kms, REG_MDP5_INTR_EN);
0090 status = mdp5_read(mdp5_kms, REG_MDP5_INTR_STATUS) & enable;
0091 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, status);
0092
0093 VERB("status=%08x", status);
0094
0095 mdp_dispatch_irqs(mdp_kms, status);
0096
0097 for (id = 0; id < priv->num_crtcs; id++)
0098 if (status & mdp5_crtc_vblank(priv->crtcs[id]))
0099 drm_handle_vblank(dev, id);
0100
0101 return IRQ_HANDLED;
0102 }
0103
0104 int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
0105 {
0106 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
0107 struct device *dev = &mdp5_kms->pdev->dev;
0108
0109 pm_runtime_get_sync(dev);
0110 mdp_update_vblank_mask(to_mdp_kms(kms),
0111 mdp5_crtc_vblank(crtc), true);
0112 pm_runtime_put_sync(dev);
0113
0114 return 0;
0115 }
0116
0117 void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
0118 {
0119 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
0120 struct device *dev = &mdp5_kms->pdev->dev;
0121
0122 pm_runtime_get_sync(dev);
0123 mdp_update_vblank_mask(to_mdp_kms(kms),
0124 mdp5_crtc_vblank(crtc), false);
0125 pm_runtime_put_sync(dev);
0126 }