disp/mdp5/mdp5_ctl.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2014 The Linux Foundation. All rights reserved.
0004  */
0005
0006 #ifndef __MDP5_CTL_H__
0007 #define __MDP5_CTL_H__
0008
0009 #include "msm_drv.h"
0010
0011 /*
0012  * CTL Manager prototypes:
0013  * mdp5_ctlm_init() returns a ctlm (CTL Manager) handler,
0014  * which is then used to call the other mdp5_ctlm_*(ctlm, ...) functions.
0015  */
0016 struct mdp5_ctl_manager;
0017 struct mdp5_ctl_manager *mdp5_ctlm_init(struct drm_device *dev,
0018         void __iomem *mmio_base, struct mdp5_cfg_handler *cfg_hnd);
0019 void mdp5_ctlm_hw_reset(struct mdp5_ctl_manager *ctlm);
0020 void mdp5_ctlm_destroy(struct mdp5_ctl_manager *ctlm);
0021
0022 /*
0023  * CTL prototypes:
0024  * mdp5_ctl_request(ctlm, ...) returns a ctl (CTL resource) handler,
0025  * which is then used to call the other mdp5_ctl_*(ctl, ...) functions.
0026  */
0027 struct mdp5_ctl *mdp5_ctlm_request(struct mdp5_ctl_manager *ctlm, int intf_num);
0028
0029 int mdp5_ctl_get_ctl_id(struct mdp5_ctl *ctl);
0030
0031 struct mdp5_interface;
0032 struct mdp5_pipeline;
0033 int mdp5_ctl_set_pipeline(struct mdp5_ctl *ctl, struct mdp5_pipeline *p);
0034 int mdp5_ctl_set_encoder_state(struct mdp5_ctl *ctl, struct mdp5_pipeline *p,
0035                    bool enabled);
0036
0037 int mdp5_ctl_set_cursor(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline,
0038             int cursor_id, bool enable);
0039 int mdp5_ctl_pair(struct mdp5_ctl *ctlx, struct mdp5_ctl *ctly, bool enable);
0040
0041 #define MAX_PIPE_STAGE      2
0042
0043 /*
0044  * mdp5_ctl_blend() - Blend multiple layers on a Layer Mixer (LM)
0045  *
0046  * @stage: array to contain the pipe num for each stage
0047  * @stage_cnt: valid stage number in stage array
0048  * @ctl_blend_op_flags: blender operation mode flags
0049  *
0050  * Note:
0051  * CTL registers need to be flushed after calling this function
0052  * (call mdp5_ctl_commit() with mdp_ctl_flush_mask_ctl() mask)
0053  */
0054 #define MDP5_CTL_BLEND_OP_FLAG_BORDER_OUT   BIT(0)
0055 int mdp5_ctl_blend(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline,
0056            enum mdp5_pipe stage[][MAX_PIPE_STAGE],
0057            enum mdp5_pipe r_stage[][MAX_PIPE_STAGE],
0058            u32 stage_cnt, u32 ctl_blend_op_flags);
0059
0060 /**
0061  * mdp_ctl_flush_mask...() - Register FLUSH masks
0062  *
0063  * These masks are used to specify which block(s) need to be flushed
0064  * through @flush_mask parameter in mdp5_ctl_commit(.., flush_mask).
0065  */
0066 u32 mdp_ctl_flush_mask_lm(int lm);
0067 u32 mdp_ctl_flush_mask_pipe(enum mdp5_pipe pipe);
0068 u32 mdp_ctl_flush_mask_cursor(int cursor_id);
0069 u32 mdp_ctl_flush_mask_encoder(struct mdp5_interface *intf);
0070
0071 /* @flush_mask: see CTL flush masks definitions below */
0072 u32 mdp5_ctl_commit(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline,
0073             u32 flush_mask, bool start);
0074 u32 mdp5_ctl_get_commit_status(struct mdp5_ctl *ctl);
0075
0076
0077
0078 #endif /* __MDP5_CTL_H__ */