disp/mdp4/mdp4_plane.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2013 Red Hat
0004  * Author: Rob Clark <robdclark@gmail.com>
0005  */
0006
0007 #include <drm/drm_atomic.h>
0008 #include <drm/drm_damage_helper.h>
0009 #include <drm/drm_fourcc.h>
0010 #include <drm/drm_framebuffer.h>
0011 #include <drm/drm_gem_atomic_helper.h>
0012
0013 #include "mdp4_kms.h"
0014
0015 #define DOWN_SCALE_MAX  8
0016 #define UP_SCALE_MAX    8
0017
0018 struct mdp4_plane {
0019     struct drm_plane base;
0020     const char *name;
0021
0022     enum mdp4_pipe pipe;
0023
0024     uint32_t caps;
0025     uint32_t nformats;
0026     uint32_t formats[32];
0027
0028     bool enabled;
0029 };
0030 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
0031
0032 /* MDP format helper functions */
0033 static inline
0034 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
0035 {
0036     bool is_tile = false;
0037
0038     if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
0039         is_tile = true;
0040
0041     if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
0042         return FRAME_TILE_YCBCR_420;
0043
0044     return FRAME_LINEAR;
0045 }
0046
0047 static void mdp4_plane_set_scanout(struct drm_plane *plane,
0048         struct drm_framebuffer *fb);
0049 static int mdp4_plane_mode_set(struct drm_plane *plane,
0050         struct drm_crtc *crtc, struct drm_framebuffer *fb,
0051         int crtc_x, int crtc_y,
0052         unsigned int crtc_w, unsigned int crtc_h,
0053         uint32_t src_x, uint32_t src_y,
0054         uint32_t src_w, uint32_t src_h);
0055
0056 static struct mdp4_kms *get_kms(struct drm_plane *plane)
0057 {
0058     struct msm_drm_private *priv = plane->dev->dev_private;
0059     return to_mdp4_kms(to_mdp_kms(priv->kms));
0060 }
0061
0062 static void mdp4_plane_destroy(struct drm_plane *plane)
0063 {
0064     struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
0065
0066     drm_plane_cleanup(plane);
0067
0068     kfree(mdp4_plane);
0069 }
0070
0071 /* helper to install properties which are common to planes and crtcs */
0072 static void mdp4_plane_install_properties(struct drm_plane *plane,
0073         struct drm_mode_object *obj)
0074 {
0075     // XXX
0076 }
0077
0078 static int mdp4_plane_set_property(struct drm_plane *plane,
0079         struct drm_property *property, uint64_t val)
0080 {
0081     // XXX
0082     return -EINVAL;
0083 }
0084
0085 static const struct drm_plane_funcs mdp4_plane_funcs = {
0086         .update_plane = drm_atomic_helper_update_plane,
0087         .disable_plane = drm_atomic_helper_disable_plane,
0088         .destroy = mdp4_plane_destroy,
0089         .set_property = mdp4_plane_set_property,
0090         .reset = drm_atomic_helper_plane_reset,
0091         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
0092         .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
0093 };
0094
0095 static int mdp4_plane_prepare_fb(struct drm_plane *plane,
0096                  struct drm_plane_state *new_state)
0097 {
0098     struct msm_drm_private *priv = plane->dev->dev_private;
0099     struct msm_kms *kms = priv->kms;
0100
0101     if (!new_state->fb)
0102         return 0;
0103
0104     drm_gem_plane_helper_prepare_fb(plane, new_state);
0105
0106     return msm_framebuffer_prepare(new_state->fb, kms->aspace, false);
0107 }
0108
0109 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
0110                   struct drm_plane_state *old_state)
0111 {
0112     struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
0113     struct mdp4_kms *mdp4_kms = get_kms(plane);
0114     struct msm_kms *kms = &mdp4_kms->base.base;
0115     struct drm_framebuffer *fb = old_state->fb;
0116
0117     if (!fb)
0118         return;
0119
0120     DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
0121     msm_framebuffer_cleanup(fb, kms->aspace, false);
0122 }
0123
0124
0125 static int mdp4_plane_atomic_check(struct drm_plane *plane,
0126         struct drm_atomic_state *state)
0127 {
0128     return 0;
0129 }
0130
0131 static void mdp4_plane_atomic_update(struct drm_plane *plane,
0132                      struct drm_atomic_state *state)
0133 {
0134     struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
0135                                        plane);
0136     int ret;
0137
0138     ret = mdp4_plane_mode_set(plane,
0139             new_state->crtc, new_state->fb,
0140             new_state->crtc_x, new_state->crtc_y,
0141             new_state->crtc_w, new_state->crtc_h,
0142             new_state->src_x,  new_state->src_y,
0143             new_state->src_w, new_state->src_h);
0144     /* atomic_check should have ensured that this doesn't fail */
0145     WARN_ON(ret < 0);
0146 }
0147
0148 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
0149         .prepare_fb = mdp4_plane_prepare_fb,
0150         .cleanup_fb = mdp4_plane_cleanup_fb,
0151         .atomic_check = mdp4_plane_atomic_check,
0152         .atomic_update = mdp4_plane_atomic_update,
0153 };
0154
0155 static void mdp4_plane_set_scanout(struct drm_plane *plane,
0156         struct drm_framebuffer *fb)
0157 {
0158     struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
0159     struct mdp4_kms *mdp4_kms = get_kms(plane);
0160     struct msm_kms *kms = &mdp4_kms->base.base;
0161     enum mdp4_pipe pipe = mdp4_plane->pipe;
0162
0163     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
0164             MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
0165             MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
0166
0167     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
0168             MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
0169             MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
0170
0171     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
0172             msm_framebuffer_iova(fb, kms->aspace, 0));
0173     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
0174             msm_framebuffer_iova(fb, kms->aspace, 1));
0175     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
0176             msm_framebuffer_iova(fb, kms->aspace, 2));
0177     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
0178             msm_framebuffer_iova(fb, kms->aspace, 3));
0179 }
0180
0181 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
0182         enum mdp4_pipe pipe, struct csc_cfg *csc)
0183 {
0184     int i;
0185
0186     for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
0187         mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
0188                 csc->matrix[i]);
0189     }
0190
0191     for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
0192         mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
0193                 csc->pre_bias[i]);
0194
0195         mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
0196                 csc->post_bias[i]);
0197     }
0198
0199     for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
0200         mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
0201                 csc->pre_clamp[i]);
0202
0203         mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
0204                 csc->post_clamp[i]);
0205     }
0206 }
0207
0208 #define MDP4_VG_PHASE_STEP_DEFAULT  0x20000000
0209
0210 static int mdp4_plane_mode_set(struct drm_plane *plane,
0211         struct drm_crtc *crtc, struct drm_framebuffer *fb,
0212         int crtc_x, int crtc_y,
0213         unsigned int crtc_w, unsigned int crtc_h,
0214         uint32_t src_x, uint32_t src_y,
0215         uint32_t src_w, uint32_t src_h)
0216 {
0217     struct drm_device *dev = plane->dev;
0218     struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
0219     struct mdp4_kms *mdp4_kms = get_kms(plane);
0220     enum mdp4_pipe pipe = mdp4_plane->pipe;
0221     const struct mdp_format *format;
0222     uint32_t op_mode = 0;
0223     uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
0224     uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
0225     enum mdp4_frame_format frame_type;
0226
0227     if (!(crtc && fb)) {
0228         DBG("%s: disabled!", mdp4_plane->name);
0229         return 0;
0230     }
0231
0232     frame_type = mdp4_get_frame_format(fb);
0233
0234     /* src values are in Q16 fixed point, convert to integer: */
0235     src_x = src_x >> 16;
0236     src_y = src_y >> 16;
0237     src_w = src_w >> 16;
0238     src_h = src_h >> 16;
0239
0240     DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
0241             fb->base.id, src_x, src_y, src_w, src_h,
0242             crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
0243
0244     format = to_mdp_format(msm_framebuffer_format(fb));
0245
0246     if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
0247         DRM_DEV_ERROR(dev->dev, "Width down scaling exceeds limits!\n");
0248         return -ERANGE;
0249     }
0250
0251     if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
0252         DRM_DEV_ERROR(dev->dev, "Height down scaling exceeds limits!\n");
0253         return -ERANGE;
0254     }
0255
0256     if (crtc_w > (src_w * UP_SCALE_MAX)) {
0257         DRM_DEV_ERROR(dev->dev, "Width up scaling exceeds limits!\n");
0258         return -ERANGE;
0259     }
0260
0261     if (crtc_h > (src_h * UP_SCALE_MAX)) {
0262         DRM_DEV_ERROR(dev->dev, "Height up scaling exceeds limits!\n");
0263         return -ERANGE;
0264     }
0265
0266     if (src_w != crtc_w) {
0267         uint32_t sel_unit = SCALE_FIR;
0268         op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
0269
0270         if (MDP_FORMAT_IS_YUV(format)) {
0271             if (crtc_w > src_w)
0272                 sel_unit = SCALE_PIXEL_RPT;
0273             else if (crtc_w <= (src_w / 4))
0274                 sel_unit = SCALE_MN_PHASE;
0275
0276             op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
0277             phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
0278                     src_w, crtc_w);
0279         }
0280     }
0281
0282     if (src_h != crtc_h) {
0283         uint32_t sel_unit = SCALE_FIR;
0284         op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
0285
0286         if (MDP_FORMAT_IS_YUV(format)) {
0287
0288             if (crtc_h > src_h)
0289                 sel_unit = SCALE_PIXEL_RPT;
0290             else if (crtc_h <= (src_h / 4))
0291                 sel_unit = SCALE_MN_PHASE;
0292
0293             op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
0294             phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
0295                     src_h, crtc_h);
0296         }
0297     }
0298
0299     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
0300             MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
0301             MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
0302
0303     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
0304             MDP4_PIPE_SRC_XY_X(src_x) |
0305             MDP4_PIPE_SRC_XY_Y(src_y));
0306
0307     mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
0308             MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
0309             MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
0310
0311     mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
0312             MDP4_PIPE_DST_XY_X(crtc_x) |
0313             MDP4_PIPE_DST_XY_Y(crtc_y));
0314
0315     mdp4_plane_set_scanout(plane, fb);
0316
0317     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
0318             MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
0319             MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
0320             MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
0321             MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
0322             COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
0323             MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
0324             MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
0325             MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
0326             MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
0327             MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
0328             COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
0329
0330     mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
0331             MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
0332             MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
0333             MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
0334             MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
0335
0336     if (MDP_FORMAT_IS_YUV(format)) {
0337         struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
0338
0339         op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
0340         op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
0341         mdp4_write_csc_config(mdp4_kms, pipe, csc);
0342     }
0343
0344     mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
0345     mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
0346     mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
0347
0348     if (frame_type != FRAME_LINEAR)
0349         mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
0350                 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
0351                 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
0352
0353     return 0;
0354 }
0355
0356 static const char *pipe_names[] = {
0357         "VG1", "VG2",
0358         "RGB1", "RGB2", "RGB3",
0359         "VG3", "VG4",
0360 };
0361
0362 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
0363 {
0364     struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
0365     return mdp4_plane->pipe;
0366 }
0367
0368 static const uint64_t supported_format_modifiers[] = {
0369     DRM_FORMAT_MOD_SAMSUNG_64_32_TILE,
0370     DRM_FORMAT_MOD_LINEAR,
0371     DRM_FORMAT_MOD_INVALID
0372 };
0373
0374 /* initialize plane */
0375 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
0376         enum mdp4_pipe pipe_id, bool private_plane)
0377 {
0378     struct drm_plane *plane = NULL;
0379     struct mdp4_plane *mdp4_plane;
0380     int ret;
0381     enum drm_plane_type type;
0382
0383     mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
0384     if (!mdp4_plane) {
0385         ret = -ENOMEM;
0386         goto fail;
0387     }
0388
0389     plane = &mdp4_plane->base;
0390
0391     mdp4_plane->pipe = pipe_id;
0392     mdp4_plane->name = pipe_names[pipe_id];
0393     mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
0394
0395     mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
0396             ARRAY_SIZE(mdp4_plane->formats),
0397             !pipe_supports_yuv(mdp4_plane->caps));
0398
0399     type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
0400     ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
0401                  mdp4_plane->formats, mdp4_plane->nformats,
0402                  supported_format_modifiers, type, NULL);
0403     if (ret)
0404         goto fail;
0405
0406     drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
0407
0408     mdp4_plane_install_properties(plane, &plane->base);
0409
0410     drm_plane_enable_fb_damage_clips(plane);
0411
0412     return plane;
0413
0414 fail:
0415     if (plane)
0416         mdp4_plane_destroy(plane);
0417
0418     return ERR_PTR(ret);
0419 }