0001
0002
0003
0004
0005
0006
0007 #include <drm/drm_print.h>
0008 #include <drm/drm_vblank.h>
0009
0010 #include "msm_drv.h"
0011 #include "mdp4_kms.h"
0012
0013 void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
0014 uint32_t old_irqmask)
0015 {
0016 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_CLEAR,
0017 irqmask ^ (irqmask & old_irqmask));
0018 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_ENABLE, irqmask);
0019 }
0020
0021 static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
0022 {
0023 struct mdp4_kms *mdp4_kms = container_of(irq, struct mdp4_kms, error_handler);
0024 static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1);
0025 extern bool dumpstate;
0026
0027 DRM_ERROR_RATELIMITED("errors: %08x\n", irqstatus);
0028
0029 if (dumpstate && __ratelimit(&rs)) {
0030 struct drm_printer p = drm_info_printer(mdp4_kms->dev->dev);
0031 drm_state_dump(mdp4_kms->dev, &p);
0032 }
0033 }
0034
0035 void mdp4_irq_preinstall(struct msm_kms *kms)
0036 {
0037 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
0038 mdp4_enable(mdp4_kms);
0039 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
0040 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
0041 mdp4_disable(mdp4_kms);
0042 }
0043
0044 int mdp4_irq_postinstall(struct msm_kms *kms)
0045 {
0046 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
0047 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
0048 struct mdp_irq *error_handler = &mdp4_kms->error_handler;
0049
0050 error_handler->irq = mdp4_irq_error_handler;
0051 error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN |
0052 MDP4_IRQ_EXTERNAL_INTF_UDERRUN;
0053
0054 mdp_irq_register(mdp_kms, error_handler);
0055
0056 return 0;
0057 }
0058
0059 void mdp4_irq_uninstall(struct msm_kms *kms)
0060 {
0061 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
0062 mdp4_enable(mdp4_kms);
0063 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
0064 mdp4_disable(mdp4_kms);
0065 }
0066
0067 irqreturn_t mdp4_irq(struct msm_kms *kms)
0068 {
0069 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
0070 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
0071 struct drm_device *dev = mdp4_kms->dev;
0072 struct msm_drm_private *priv = dev->dev_private;
0073 unsigned int id;
0074 uint32_t status, enable;
0075
0076 enable = mdp4_read(mdp4_kms, REG_MDP4_INTR_ENABLE);
0077 status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS) & enable;
0078 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, status);
0079
0080 VERB("status=%08x", status);
0081
0082 mdp_dispatch_irqs(mdp_kms, status);
0083
0084 for (id = 0; id < priv->num_crtcs; id++)
0085 if (status & mdp4_crtc_vblank(priv->crtcs[id]))
0086 drm_handle_vblank(dev, id);
0087
0088 return IRQ_HANDLED;
0089 }
0090
0091 int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
0092 {
0093 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
0094
0095 mdp4_enable(mdp4_kms);
0096 mdp_update_vblank_mask(to_mdp_kms(kms),
0097 mdp4_crtc_vblank(crtc), true);
0098 mdp4_disable(mdp4_kms);
0099
0100 return 0;
0101 }
0102
0103 void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
0104 {
0105 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
0106
0107 mdp4_enable(mdp4_kms);
0108 mdp_update_vblank_mask(to_mdp_kms(kms),
0109 mdp4_crtc_vblank(crtc), false);
0110 mdp4_disable(mdp4_kms);
0111 }