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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
0003  */
0004 
0005 #if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
0006 #define _DPU_TRACE_H_
0007 
0008 #include <linux/stringify.h>
0009 #include <linux/types.h>
0010 #include <linux/tracepoint.h>
0011 
0012 #include <drm/drm_rect.h>
0013 #include "dpu_crtc.h"
0014 #include "dpu_encoder_phys.h"
0015 #include "dpu_hw_mdss.h"
0016 #include "dpu_hw_vbif.h"
0017 #include "dpu_plane.h"
0018 
0019 #undef TRACE_SYSTEM
0020 #define TRACE_SYSTEM dpu
0021 #undef TRACE_INCLUDE_FILE
0022 #define TRACE_INCLUDE_FILE dpu_trace
0023 
0024 TRACE_EVENT(dpu_perf_set_qos_luts,
0025     TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl,
0026         u32 lut, u32 lut_usage),
0027     TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage),
0028     TP_STRUCT__entry(
0029             __field(u32, pnum)
0030             __field(u32, fmt)
0031             __field(bool, rt)
0032             __field(u32, fl)
0033             __field(u64, lut)
0034             __field(u32, lut_usage)
0035     ),
0036     TP_fast_assign(
0037             __entry->pnum = pnum;
0038             __entry->fmt = fmt;
0039             __entry->rt = rt;
0040             __entry->fl = fl;
0041             __entry->lut = lut;
0042             __entry->lut_usage = lut_usage;
0043     ),
0044     TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d",
0045             __entry->pnum, __entry->fmt,
0046             __entry->rt, __entry->fl,
0047             __entry->lut, __entry->lut_usage)
0048 );
0049 
0050 TRACE_EVENT(dpu_perf_set_danger_luts,
0051     TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut,
0052         u32 safe_lut),
0053     TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut),
0054     TP_STRUCT__entry(
0055             __field(u32, pnum)
0056             __field(u32, fmt)
0057             __field(u32, mode)
0058             __field(u32, danger_lut)
0059             __field(u32, safe_lut)
0060     ),
0061     TP_fast_assign(
0062             __entry->pnum = pnum;
0063             __entry->fmt = fmt;
0064             __entry->mode = mode;
0065             __entry->danger_lut = danger_lut;
0066             __entry->safe_lut = safe_lut;
0067     ),
0068     TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]",
0069             __entry->pnum, __entry->fmt,
0070             __entry->mode, __entry->danger_lut,
0071             __entry->safe_lut)
0072 );
0073 
0074 TRACE_EVENT(dpu_perf_set_ot,
0075     TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx),
0076     TP_ARGS(pnum, xin_id, rd_lim, vbif_idx),
0077     TP_STRUCT__entry(
0078             __field(u32, pnum)
0079             __field(u32, xin_id)
0080             __field(u32, rd_lim)
0081             __field(u32, vbif_idx)
0082     ),
0083     TP_fast_assign(
0084             __entry->pnum = pnum;
0085             __entry->xin_id = xin_id;
0086             __entry->rd_lim = rd_lim;
0087             __entry->vbif_idx = vbif_idx;
0088     ),
0089     TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d",
0090             __entry->pnum, __entry->xin_id, __entry->rd_lim,
0091             __entry->vbif_idx)
0092 )
0093 
0094 TRACE_EVENT(dpu_cmd_release_bw,
0095     TP_PROTO(u32 crtc_id),
0096     TP_ARGS(crtc_id),
0097     TP_STRUCT__entry(
0098             __field(u32, crtc_id)
0099     ),
0100     TP_fast_assign(
0101             __entry->crtc_id = crtc_id;
0102     ),
0103     TP_printk("crtc:%d", __entry->crtc_id)
0104 );
0105 
0106 TRACE_EVENT(tracing_mark_write,
0107     TP_PROTO(int pid, const char *name, bool trace_begin),
0108     TP_ARGS(pid, name, trace_begin),
0109     TP_STRUCT__entry(
0110             __field(int, pid)
0111             __string(trace_name, name)
0112             __field(bool, trace_begin)
0113     ),
0114     TP_fast_assign(
0115             __entry->pid = pid;
0116             __assign_str(trace_name, name);
0117             __entry->trace_begin = trace_begin;
0118     ),
0119     TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E",
0120         __entry->pid, __get_str(trace_name))
0121 )
0122 
0123 TRACE_EVENT(dpu_trace_counter,
0124     TP_PROTO(int pid, char *name, int value),
0125     TP_ARGS(pid, name, value),
0126     TP_STRUCT__entry(
0127             __field(int, pid)
0128             __string(counter_name, name)
0129             __field(int, value)
0130     ),
0131     TP_fast_assign(
0132             __entry->pid = current->tgid;
0133             __assign_str(counter_name, name);
0134             __entry->value = value;
0135     ),
0136     TP_printk("%d|%s|%d", __entry->pid,
0137             __get_str(counter_name), __entry->value)
0138 )
0139 
0140 TRACE_EVENT(dpu_perf_crtc_update,
0141     TP_PROTO(u32 crtc, u64 bw_ctl, u32 core_clk_rate,
0142             bool stop_req, bool update_bus, bool update_clk),
0143     TP_ARGS(crtc, bw_ctl, core_clk_rate, stop_req, update_bus, update_clk),
0144     TP_STRUCT__entry(
0145             __field(u32, crtc)
0146             __field(u64, bw_ctl)
0147             __field(u32, core_clk_rate)
0148             __field(bool, stop_req)
0149             __field(u32, update_bus)
0150             __field(u32, update_clk)
0151     ),
0152     TP_fast_assign(
0153             __entry->crtc = crtc;
0154             __entry->bw_ctl = bw_ctl;
0155             __entry->core_clk_rate = core_clk_rate;
0156             __entry->stop_req = stop_req;
0157             __entry->update_bus = update_bus;
0158             __entry->update_clk = update_clk;
0159     ),
0160      TP_printk(
0161         "crtc=%d bw_ctl=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d",
0162             __entry->crtc,
0163             __entry->bw_ctl,
0164             __entry->core_clk_rate,
0165             __entry->stop_req,
0166             __entry->update_bus,
0167             __entry->update_clk)
0168 );
0169 
0170 DECLARE_EVENT_CLASS(dpu_irq_template,
0171     TP_PROTO(int irq_idx),
0172     TP_ARGS(irq_idx),
0173     TP_STRUCT__entry(
0174         __field(    int,            irq_idx     )
0175     ),
0176     TP_fast_assign(
0177         __entry->irq_idx = irq_idx;
0178     ),
0179     TP_printk("irq=%d", __entry->irq_idx)
0180 );
0181 DEFINE_EVENT(dpu_irq_template, dpu_irq_register_success,
0182     TP_PROTO(int irq_idx),
0183     TP_ARGS(irq_idx)
0184 );
0185 DEFINE_EVENT(dpu_irq_template, dpu_irq_unregister_success,
0186     TP_PROTO(int irq_idx),
0187     TP_ARGS(irq_idx)
0188 );
0189 
0190 TRACE_EVENT(dpu_enc_irq_wait_success,
0191     TP_PROTO(uint32_t drm_id, void *func,
0192          int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt),
0193     TP_ARGS(drm_id, func, irq_idx, pp_idx, atomic_cnt),
0194     TP_STRUCT__entry(
0195         __field(    uint32_t,       drm_id      )
0196         __field(    void *,         func        )
0197         __field(    int,            irq_idx     )
0198         __field(    enum dpu_pingpong,  pp_idx      )
0199         __field(    int,            atomic_cnt  )
0200     ),
0201     TP_fast_assign(
0202         __entry->drm_id = drm_id;
0203         __entry->func = func;
0204         __entry->irq_idx = irq_idx;
0205         __entry->pp_idx = pp_idx;
0206         __entry->atomic_cnt = atomic_cnt;
0207     ),
0208     TP_printk("id=%u, callback=%ps, irq=%d, pp=%d, atomic_cnt=%d",
0209           __entry->drm_id, __entry->func,
0210           __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt)
0211 );
0212 
0213 DECLARE_EVENT_CLASS(dpu_drm_obj_template,
0214     TP_PROTO(uint32_t drm_id),
0215     TP_ARGS(drm_id),
0216     TP_STRUCT__entry(
0217         __field(    uint32_t,       drm_id      )
0218     ),
0219     TP_fast_assign(
0220         __entry->drm_id = drm_id;
0221     ),
0222     TP_printk("id=%u", __entry->drm_id)
0223 );
0224 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check,
0225     TP_PROTO(uint32_t drm_id),
0226     TP_ARGS(drm_id)
0227 );
0228 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set,
0229     TP_PROTO(uint32_t drm_id),
0230     TP_ARGS(drm_id)
0231 );
0232 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable,
0233     TP_PROTO(uint32_t drm_id),
0234     TP_ARGS(drm_id)
0235 );
0236 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff,
0237     TP_PROTO(uint32_t drm_id),
0238     TP_ARGS(drm_id)
0239 );
0240 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff,
0241     TP_PROTO(uint32_t drm_id),
0242     TP_ARGS(drm_id)
0243 );
0244 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset,
0245     TP_PROTO(uint32_t drm_id),
0246     TP_ARGS(drm_id)
0247 );
0248 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip,
0249     TP_PROTO(uint32_t drm_id),
0250     TP_ARGS(drm_id)
0251 );
0252 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb,
0253     TP_PROTO(uint32_t drm_id),
0254     TP_ARGS(drm_id)
0255 );
0256 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
0257     TP_PROTO(uint32_t drm_id),
0258     TP_ARGS(drm_id)
0259 );
0260 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
0261     TP_PROTO(uint32_t drm_id),
0262     TP_ARGS(drm_id)
0263 );
0264 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done,
0265     TP_PROTO(uint32_t drm_id),
0266     TP_ARGS(drm_id)
0267 );
0268 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_runtime_resume,
0269     TP_PROTO(uint32_t drm_id),
0270     TP_ARGS(drm_id)
0271 );
0272 
0273 TRACE_EVENT(dpu_enc_enable,
0274     TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
0275     TP_ARGS(drm_id, hdisplay, vdisplay),
0276     TP_STRUCT__entry(
0277         __field(    uint32_t,       drm_id      )
0278         __field(    int,            hdisplay    )
0279         __field(    int,            vdisplay    )
0280     ),
0281     TP_fast_assign(
0282         __entry->drm_id = drm_id;
0283         __entry->hdisplay = hdisplay;
0284         __entry->vdisplay = vdisplay;
0285     ),
0286     TP_printk("id=%u, mode=%dx%d",
0287           __entry->drm_id, __entry->hdisplay, __entry->vdisplay)
0288 );
0289 
0290 DECLARE_EVENT_CLASS(dpu_enc_keyval_template,
0291     TP_PROTO(uint32_t drm_id, int val),
0292     TP_ARGS(drm_id, val),
0293     TP_STRUCT__entry(
0294         __field(    uint32_t,   drm_id  )
0295         __field(    int,        val )
0296     ),
0297     TP_fast_assign(
0298         __entry->drm_id = drm_id;
0299         __entry->val = val;
0300     ),
0301     TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val)
0302 );
0303 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb,
0304     TP_PROTO(uint32_t drm_id, int count),
0305     TP_ARGS(drm_id, count)
0306 );
0307 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start,
0308     TP_PROTO(uint32_t drm_id, int ctl_idx),
0309     TP_ARGS(drm_id, ctl_idx)
0310 );
0311 
0312 TRACE_EVENT(dpu_enc_atomic_check_flags,
0313     TP_PROTO(uint32_t drm_id, unsigned int flags),
0314     TP_ARGS(drm_id, flags),
0315     TP_STRUCT__entry(
0316         __field(    uint32_t,       drm_id      )
0317         __field(    unsigned int,       flags       )
0318     ),
0319     TP_fast_assign(
0320         __entry->drm_id = drm_id;
0321         __entry->flags = flags;
0322     ),
0323     TP_printk("id=%u, flags=%u",
0324           __entry->drm_id, __entry->flags)
0325 );
0326 
0327 DECLARE_EVENT_CLASS(dpu_enc_id_enable_template,
0328     TP_PROTO(uint32_t drm_id, bool enable),
0329     TP_ARGS(drm_id, enable),
0330     TP_STRUCT__entry(
0331         __field(    uint32_t,       drm_id      )
0332         __field(    bool,           enable      )
0333     ),
0334     TP_fast_assign(
0335         __entry->drm_id = drm_id;
0336         __entry->enable = enable;
0337     ),
0338     TP_printk("id=%u, enable=%s",
0339           __entry->drm_id, __entry->enable ? "true" : "false")
0340 );
0341 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,
0342     TP_PROTO(uint32_t drm_id, bool enable),
0343     TP_ARGS(drm_id, enable)
0344 );
0345 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,
0346     TP_PROTO(uint32_t drm_id, bool enable),
0347     TP_ARGS(drm_id, enable)
0348 );
0349 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_frame_event_cb,
0350     TP_PROTO(uint32_t drm_id, bool enable),
0351     TP_ARGS(drm_id, enable)
0352 );
0353 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te,
0354     TP_PROTO(uint32_t drm_id, bool enable),
0355     TP_ARGS(drm_id, enable)
0356 );
0357 
0358 TRACE_EVENT(dpu_enc_rc,
0359     TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported,
0360          int rc_state, const char *stage),
0361     TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage),
0362     TP_STRUCT__entry(
0363         __field(    uint32_t,   drm_id          )
0364         __field(    u32,        sw_event        )
0365         __field(    bool,       idle_pc_supported   )
0366         __field(    int,        rc_state        )
0367         __string(   stage_str,  stage           )
0368     ),
0369     TP_fast_assign(
0370         __entry->drm_id = drm_id;
0371         __entry->sw_event = sw_event;
0372         __entry->idle_pc_supported = idle_pc_supported;
0373         __entry->rc_state = rc_state;
0374         __assign_str(stage_str, stage);
0375     ),
0376     TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d",
0377           __get_str(stage_str), __entry->drm_id, __entry->sw_event,
0378           __entry->idle_pc_supported ? "true" : "false",
0379           __entry->rc_state)
0380 );
0381 
0382 TRACE_EVENT(dpu_enc_frame_done_cb_not_busy,
0383     TP_PROTO(uint32_t drm_id, u32 event, char *intf_mode, enum dpu_intf intf_idx,
0384             enum dpu_wb wb_idx),
0385     TP_ARGS(drm_id, event, intf_mode, intf_idx, wb_idx),
0386     TP_STRUCT__entry(
0387         __field(    uint32_t,   drm_id      )
0388         __field(    u32,        event       )
0389         __string(   intf_mode_str,  intf_mode   )
0390         __field(    enum dpu_intf,  intf_idx    )
0391         __field(    enum dpu_wb,    wb_idx      )
0392     ),
0393     TP_fast_assign(
0394         __entry->drm_id = drm_id;
0395         __entry->event = event;
0396         __assign_str(intf_mode_str, intf_mode);
0397         __entry->intf_idx = intf_idx;
0398         __entry->wb_idx = wb_idx;
0399     ),
0400     TP_printk("id=%u, event=%u, intf_mode=%s intf=%d wb=%d", __entry->drm_id,
0401             __entry->event, __get_str(intf_mode_str),
0402             __entry->intf_idx, __entry->wb_idx)
0403 );
0404 
0405 TRACE_EVENT(dpu_enc_frame_done_cb,
0406     TP_PROTO(uint32_t drm_id, unsigned int idx,
0407          unsigned long frame_busy_mask),
0408     TP_ARGS(drm_id, idx, frame_busy_mask),
0409     TP_STRUCT__entry(
0410         __field(    uint32_t,       drm_id      )
0411         __field(    unsigned int,       idx     )
0412         __field(    unsigned long,      frame_busy_mask )
0413     ),
0414     TP_fast_assign(
0415         __entry->drm_id = drm_id;
0416         __entry->idx = idx;
0417         __entry->frame_busy_mask = frame_busy_mask;
0418     ),
0419     TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id,
0420           __entry->idx, __entry->frame_busy_mask)
0421 );
0422 
0423 TRACE_EVENT(dpu_enc_trigger_flush,
0424     TP_PROTO(uint32_t drm_id, char *intf_mode, enum dpu_intf intf_idx, enum dpu_wb wb_idx,
0425          int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits,
0426          u32 pending_flush_ret),
0427     TP_ARGS(drm_id, intf_mode, intf_idx, wb_idx, pending_kickoff_cnt, ctl_idx,
0428         extra_flush_bits, pending_flush_ret),
0429     TP_STRUCT__entry(
0430         __field(    uint32_t,   drm_id          )
0431         __string(   intf_mode_str,  intf_mode       )
0432         __field(    enum dpu_intf,  intf_idx        )
0433         __field(    enum dpu_wb,    wb_idx          )
0434         __field(    int,        pending_kickoff_cnt )
0435         __field(    int,        ctl_idx         )
0436         __field(    u32,        extra_flush_bits    )
0437         __field(    u32,        pending_flush_ret   )
0438     ),
0439     TP_fast_assign(
0440         __entry->drm_id = drm_id;
0441         __assign_str(intf_mode_str, intf_mode);
0442         __entry->intf_idx = intf_idx;
0443         __entry->wb_idx = wb_idx;
0444         __entry->pending_kickoff_cnt = pending_kickoff_cnt;
0445         __entry->ctl_idx = ctl_idx;
0446         __entry->extra_flush_bits = extra_flush_bits;
0447         __entry->pending_flush_ret = pending_flush_ret;
0448     ),
0449     TP_printk("id=%u, intf_mode=%s, intf_idx=%d, wb_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
0450           "extra_flush_bits=0x%x pending_flush_ret=0x%x",
0451           __entry->drm_id, __get_str(intf_mode_str), __entry->intf_idx, __entry->wb_idx,
0452           __entry->pending_kickoff_cnt, __entry->ctl_idx,
0453           __entry->extra_flush_bits, __entry->pending_flush_ret)
0454 );
0455 
0456 DECLARE_EVENT_CLASS(dpu_enc_ktime_template,
0457     TP_PROTO(uint32_t drm_id, ktime_t time),
0458     TP_ARGS(drm_id, time),
0459     TP_STRUCT__entry(
0460         __field(    uint32_t,   drm_id  )
0461         __field(    ktime_t,    time    )
0462     ),
0463     TP_fast_assign(
0464         __entry->drm_id = drm_id;
0465         __entry->time = time;
0466     ),
0467     TP_printk("id=%u, time=%lld", __entry->drm_id,
0468           ktime_to_ms(__entry->time))
0469 );
0470 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_vsync_event_work,
0471     TP_PROTO(uint32_t drm_id, ktime_t time),
0472     TP_ARGS(drm_id, time)
0473 );
0474 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_early_kickoff,
0475     TP_PROTO(uint32_t drm_id, ktime_t time),
0476     TP_ARGS(drm_id, time)
0477 );
0478 
0479 DECLARE_EVENT_CLASS(dpu_id_event_template,
0480     TP_PROTO(uint32_t drm_id, u32 event),
0481     TP_ARGS(drm_id, event),
0482     TP_STRUCT__entry(
0483         __field(    uint32_t,   drm_id  )
0484         __field(    u32,        event   )
0485     ),
0486     TP_fast_assign(
0487         __entry->drm_id = drm_id;
0488         __entry->event = event;
0489     ),
0490     TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event)
0491 );
0492 DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout,
0493     TP_PROTO(uint32_t drm_id, u32 event),
0494     TP_ARGS(drm_id, event)
0495 );
0496 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb,
0497     TP_PROTO(uint32_t drm_id, u32 event),
0498     TP_ARGS(drm_id, event)
0499 );
0500 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done,
0501     TP_PROTO(uint32_t drm_id, u32 event),
0502     TP_ARGS(drm_id, event)
0503 );
0504 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending,
0505     TP_PROTO(uint32_t drm_id, u32 event),
0506     TP_ARGS(drm_id, event)
0507 );
0508 
0509 TRACE_EVENT(dpu_enc_wait_event_timeout,
0510     TP_PROTO(uint32_t drm_id, int irq_idx, int rc, s64 time,
0511          s64 expected_time, int atomic_cnt),
0512     TP_ARGS(drm_id, irq_idx, rc, time, expected_time, atomic_cnt),
0513     TP_STRUCT__entry(
0514         __field(    uint32_t,   drm_id      )
0515         __field(    int,        irq_idx     )
0516         __field(    int,        rc      )
0517         __field(    s64,        time        )
0518         __field(    s64,        expected_time   )
0519         __field(    int,        atomic_cnt  )
0520     ),
0521     TP_fast_assign(
0522         __entry->drm_id = drm_id;
0523         __entry->irq_idx = irq_idx;
0524         __entry->rc = rc;
0525         __entry->time = time;
0526         __entry->expected_time = expected_time;
0527         __entry->atomic_cnt = atomic_cnt;
0528     ),
0529     TP_printk("id=%u, irq_idx=%d, rc=%d, time=%lld, expected=%lld cnt=%d",
0530           __entry->drm_id, __entry->irq_idx, __entry->rc, __entry->time,
0531           __entry->expected_time, __entry->atomic_cnt)
0532 );
0533 
0534 TRACE_EVENT(dpu_enc_phys_cmd_irq_ctrl,
0535     TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, bool enable,
0536          int refcnt),
0537     TP_ARGS(drm_id, pp, enable, refcnt),
0538     TP_STRUCT__entry(
0539         __field(    uint32_t,       drm_id  )
0540         __field(    enum dpu_pingpong,  pp  )
0541         __field(    bool,           enable  )
0542         __field(    int,            refcnt  )
0543     ),
0544     TP_fast_assign(
0545         __entry->drm_id = drm_id;
0546         __entry->pp = pp;
0547         __entry->enable = enable;
0548         __entry->refcnt = refcnt;
0549     ),
0550     TP_printk("id=%u, pp=%d, enable=%s, refcnt=%d", __entry->drm_id,
0551           __entry->pp, __entry->enable ? "true" : "false",
0552           __entry->refcnt)
0553 );
0554 
0555 TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done,
0556     TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count,
0557          u32 event),
0558     TP_ARGS(drm_id, pp, new_count, event),
0559     TP_STRUCT__entry(
0560         __field(    uint32_t,       drm_id      )
0561         __field(    enum dpu_pingpong,  pp      )
0562         __field(    int,            new_count   )
0563         __field(    u32,            event       )
0564     ),
0565     TP_fast_assign(
0566         __entry->drm_id = drm_id;
0567         __entry->pp = pp;
0568         __entry->new_count = new_count;
0569         __entry->event = event;
0570     ),
0571     TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id,
0572           __entry->pp, __entry->new_count, __entry->event)
0573 );
0574 
0575 TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout,
0576     TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count,
0577          int kickoff_count, u32 event),
0578     TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event),
0579     TP_STRUCT__entry(
0580         __field(    uint32_t,       drm_id      )
0581         __field(    enum dpu_pingpong,  pp      )
0582         __field(    int,            timeout_count   )
0583         __field(    int,            kickoff_count   )
0584         __field(    u32,            event       )
0585     ),
0586     TP_fast_assign(
0587         __entry->drm_id = drm_id;
0588         __entry->pp = pp;
0589         __entry->timeout_count = timeout_count;
0590         __entry->kickoff_count = kickoff_count;
0591         __entry->event = event;
0592     ),
0593     TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u",
0594           __entry->drm_id, __entry->pp, __entry->timeout_count,
0595           __entry->kickoff_count, __entry->event)
0596 );
0597 
0598 TRACE_EVENT(dpu_enc_phys_vid_post_kickoff,
0599     TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx),
0600     TP_ARGS(drm_id, intf_idx),
0601     TP_STRUCT__entry(
0602         __field(    uint32_t,   drm_id          )
0603         __field(    enum dpu_intf,  intf_idx        )
0604     ),
0605     TP_fast_assign(
0606         __entry->drm_id = drm_id;
0607         __entry->intf_idx = intf_idx;
0608     ),
0609     TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx)
0610 );
0611 
0612 TRACE_EVENT(dpu_enc_phys_vid_irq_ctrl,
0613     TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, bool enable,
0614          int refcnt),
0615     TP_ARGS(drm_id, intf_idx, enable, refcnt),
0616     TP_STRUCT__entry(
0617         __field(    uint32_t,   drm_id      )
0618         __field(    enum dpu_intf,  intf_idx    )
0619         __field(    bool,       enable      )
0620         __field(    int,        refcnt      )
0621     ),
0622     TP_fast_assign(
0623         __entry->drm_id = drm_id;
0624         __entry->intf_idx = intf_idx;
0625         __entry->enable = enable;
0626         __entry->refcnt = refcnt;
0627     ),
0628     TP_printk("id=%u, intf_idx=%d enable=%s refcnt=%d", __entry->drm_id,
0629           __entry->intf_idx, __entry->enable ? "true" : "false",
0630           __entry->drm_id)
0631 );
0632 
0633 TRACE_EVENT(dpu_crtc_setup_mixer,
0634     TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
0635          struct drm_plane_state *state, struct dpu_plane_state *pstate,
0636          uint32_t stage_idx, enum dpu_sspp sspp, uint32_t pixel_format,
0637          uint64_t modifier),
0638     TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp,
0639         pixel_format, modifier),
0640     TP_STRUCT__entry(
0641         __field(    uint32_t,       crtc_id     )
0642         __field(    uint32_t,       plane_id    )
0643         __field(    uint32_t,       fb_id       )
0644         __field_struct( struct drm_rect,    src_rect    )
0645         __field_struct( struct drm_rect,    dst_rect    )
0646         __field(    uint32_t,       stage_idx   )
0647         __field(    enum dpu_stage,     stage       )
0648         __field(    enum dpu_sspp,      sspp        )
0649         __field(    uint32_t,       multirect_idx   )
0650         __field(    uint32_t,       multirect_mode  )
0651         __field(    uint32_t,       pixel_format    )
0652         __field(    uint64_t,       modifier    )
0653     ),
0654     TP_fast_assign(
0655         __entry->crtc_id = crtc_id;
0656         __entry->plane_id = plane_id;
0657         __entry->fb_id = state ? state->fb->base.id : 0;
0658         __entry->src_rect = drm_plane_state_src(state);
0659         __entry->dst_rect = drm_plane_state_dest(state);
0660         __entry->stage_idx = stage_idx;
0661         __entry->stage = pstate->stage;
0662         __entry->sspp = sspp;
0663         __entry->multirect_idx = pstate->multirect_index;
0664         __entry->multirect_mode = pstate->multirect_mode;
0665         __entry->pixel_format = pixel_format;
0666         __entry->modifier = modifier;
0667     ),
0668     TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:" DRM_RECT_FP_FMT
0669           " dst:" DRM_RECT_FMT " stage_idx:%u stage:%d, sspp:%d "
0670           "multirect_index:%d multirect_mode:%u pix_format:%u "
0671           "modifier:%llu",
0672           __entry->crtc_id, __entry->plane_id, __entry->fb_id,
0673           DRM_RECT_FP_ARG(&__entry->src_rect),
0674           DRM_RECT_ARG(&__entry->dst_rect),
0675           __entry->stage_idx, __entry->stage, __entry->sspp,
0676           __entry->multirect_idx, __entry->multirect_mode,
0677           __entry->pixel_format, __entry->modifier)
0678 );
0679 
0680 TRACE_EVENT(dpu_crtc_setup_lm_bounds,
0681     TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds),
0682     TP_ARGS(drm_id, mixer, bounds),
0683     TP_STRUCT__entry(
0684         __field(    uint32_t,       drm_id  )
0685         __field(    int,            mixer   )
0686         __field_struct( struct drm_rect,    bounds  )
0687     ),
0688     TP_fast_assign(
0689         __entry->drm_id = drm_id;
0690         __entry->mixer = mixer;
0691         __entry->bounds = *bounds;
0692     ),
0693     TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id,
0694           __entry->mixer, DRM_RECT_ARG(&__entry->bounds))
0695 );
0696 
0697 TRACE_EVENT(dpu_crtc_vblank_enable,
0698     TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable,
0699          struct dpu_crtc *crtc),
0700     TP_ARGS(drm_id, enc_id, enable, crtc),
0701     TP_STRUCT__entry(
0702         __field(    uint32_t,       drm_id  )
0703         __field(    uint32_t,       enc_id  )
0704         __field(    bool,           enable  )
0705         __field(    bool,           enabled )
0706     ),
0707     TP_fast_assign(
0708         __entry->drm_id = drm_id;
0709         __entry->enc_id = enc_id;
0710         __entry->enable = enable;
0711         __entry->enabled = crtc->enabled;
0712     ),
0713     TP_printk("id:%u encoder:%u enable:%s state{enabled:%s}",
0714           __entry->drm_id, __entry->enc_id,
0715           __entry->enable ? "true" : "false",
0716           __entry->enabled ? "true" : "false")
0717 );
0718 
0719 DECLARE_EVENT_CLASS(dpu_crtc_enable_template,
0720     TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
0721     TP_ARGS(drm_id, enable, crtc),
0722     TP_STRUCT__entry(
0723         __field(    uint32_t,       drm_id  )
0724         __field(    bool,           enable  )
0725         __field(    bool,           enabled )
0726     ),
0727     TP_fast_assign(
0728         __entry->drm_id = drm_id;
0729         __entry->enable = enable;
0730         __entry->enabled = crtc->enabled;
0731     ),
0732     TP_printk("id:%u enable:%s state{enabled:%s}",
0733           __entry->drm_id, __entry->enable ? "true" : "false",
0734           __entry->enabled ? "true" : "false")
0735 );
0736 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable,
0737     TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
0738     TP_ARGS(drm_id, enable, crtc)
0739 );
0740 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable,
0741     TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
0742     TP_ARGS(drm_id, enable, crtc)
0743 );
0744 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank,
0745     TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
0746     TP_ARGS(drm_id, enable, crtc)
0747 );
0748 
0749 TRACE_EVENT(dpu_crtc_disable_frame_pending,
0750     TP_PROTO(uint32_t drm_id, int frame_pending),
0751     TP_ARGS(drm_id, frame_pending),
0752     TP_STRUCT__entry(
0753         __field(    uint32_t,       drm_id      )
0754         __field(    int,            frame_pending   )
0755     ),
0756     TP_fast_assign(
0757         __entry->drm_id = drm_id;
0758         __entry->frame_pending = frame_pending;
0759     ),
0760     TP_printk("id:%u frame_pending:%d", __entry->drm_id,
0761           __entry->frame_pending)
0762 );
0763 
0764 TRACE_EVENT(dpu_plane_set_scanout,
0765     TP_PROTO(enum dpu_sspp index, struct dpu_hw_fmt_layout *layout,
0766          enum dpu_sspp_multirect_index multirect_index),
0767     TP_ARGS(index, layout, multirect_index),
0768     TP_STRUCT__entry(
0769         __field(    enum dpu_sspp,          index   )
0770         __field_struct( struct dpu_hw_fmt_layout,   layout  )
0771         __field(    enum dpu_sspp_multirect_index,  multirect_index)
0772     ),
0773     TP_fast_assign(
0774         __entry->index = index;
0775         __entry->layout = *layout;
0776         __entry->multirect_index = multirect_index;
0777     ),
0778     TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} "
0779           "multirect_index:%d", __entry->index, __entry->layout.width,
0780           __entry->layout.height, __entry->layout.plane_addr[0],
0781           __entry->layout.plane_size[0],
0782           __entry->layout.plane_addr[1],
0783           __entry->layout.plane_size[1],
0784           __entry->layout.plane_addr[2],
0785           __entry->layout.plane_size[2],
0786           __entry->layout.plane_addr[3],
0787           __entry->layout.plane_size[3], __entry->multirect_index)
0788 );
0789 
0790 TRACE_EVENT(dpu_plane_disable,
0791     TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode),
0792     TP_ARGS(drm_id, is_virtual, multirect_mode),
0793     TP_STRUCT__entry(
0794         __field(    uint32_t,       drm_id      )
0795         __field(    bool,           is_virtual  )
0796         __field(    uint32_t,       multirect_mode  )
0797     ),
0798     TP_fast_assign(
0799         __entry->drm_id = drm_id;
0800         __entry->is_virtual = is_virtual;
0801         __entry->multirect_mode = multirect_mode;
0802     ),
0803     TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id,
0804           __entry->is_virtual ? "true" : "false",
0805           __entry->multirect_mode)
0806 );
0807 
0808 DECLARE_EVENT_CLASS(dpu_rm_iter_template,
0809     TP_PROTO(uint32_t id, uint32_t enc_id),
0810     TP_ARGS(id, enc_id),
0811     TP_STRUCT__entry(
0812         __field(    uint32_t,       id  )
0813         __field(    uint32_t,       enc_id  )
0814     ),
0815     TP_fast_assign(
0816         __entry->id = id;
0817         __entry->enc_id = enc_id;
0818     ),
0819     TP_printk("id:%d enc_id:%u", __entry->id, __entry->enc_id)
0820 );
0821 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf,
0822     TP_PROTO(uint32_t id, uint32_t enc_id),
0823     TP_ARGS(id, enc_id)
0824 );
0825 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
0826     TP_PROTO(uint32_t id, uint32_t enc_id),
0827     TP_ARGS(id, enc_id)
0828 );
0829 
0830 TRACE_EVENT(dpu_rm_reserve_lms,
0831     TP_PROTO(uint32_t id, uint32_t enc_id, uint32_t pp_id),
0832     TP_ARGS(id, enc_id, pp_id),
0833     TP_STRUCT__entry(
0834         __field(    uint32_t,       id  )
0835         __field(    uint32_t,       enc_id  )
0836         __field(    uint32_t,       pp_id   )
0837     ),
0838     TP_fast_assign(
0839         __entry->id = id;
0840         __entry->enc_id = enc_id;
0841         __entry->pp_id = pp_id;
0842     ),
0843     TP_printk("id:%d enc_id:%u pp_id:%u", __entry->id,
0844           __entry->enc_id, __entry->pp_id)
0845 );
0846 
0847 TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
0848     TP_PROTO(enum dpu_vbif index, u32 xin_id),
0849     TP_ARGS(index, xin_id),
0850     TP_STRUCT__entry(
0851         __field(    enum dpu_vbif,  index   )
0852         __field(    u32,        xin_id  )
0853     ),
0854     TP_fast_assign(
0855         __entry->index = index;
0856         __entry->xin_id = xin_id;
0857     ),
0858     TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id)
0859 );
0860 
0861 TRACE_EVENT(dpu_pp_connect_ext_te,
0862     TP_PROTO(enum dpu_pingpong pp, u32 cfg),
0863     TP_ARGS(pp, cfg),
0864     TP_STRUCT__entry(
0865         __field(    enum dpu_pingpong,  pp  )
0866         __field(    u32,            cfg )
0867     ),
0868     TP_fast_assign(
0869         __entry->pp = pp;
0870         __entry->cfg = cfg;
0871     ),
0872     TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg)
0873 );
0874 
0875 TRACE_EVENT(dpu_core_irq_register_callback,
0876     TP_PROTO(int irq_idx, void *callback),
0877     TP_ARGS(irq_idx, callback),
0878     TP_STRUCT__entry(
0879         __field(    int,                irq_idx )
0880         __field(    void *,             callback)
0881     ),
0882     TP_fast_assign(
0883         __entry->irq_idx = irq_idx;
0884         __entry->callback = callback;
0885     ),
0886     TP_printk("irq_idx:%d callback:%ps", __entry->irq_idx,
0887           __entry->callback)
0888 );
0889 
0890 TRACE_EVENT(dpu_core_irq_unregister_callback,
0891     TP_PROTO(int irq_idx),
0892     TP_ARGS(irq_idx),
0893     TP_STRUCT__entry(
0894         __field(    int,                irq_idx )
0895     ),
0896     TP_fast_assign(
0897         __entry->irq_idx = irq_idx;
0898     ),
0899     TP_printk("irq_idx:%d", __entry->irq_idx)
0900 );
0901 
0902 TRACE_EVENT(dpu_core_perf_update_clk,
0903     TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate),
0904     TP_ARGS(dev, stop_req, clk_rate),
0905     TP_STRUCT__entry(
0906         __string(   dev_name,       dev->unique )
0907         __field(    bool,           stop_req    )
0908         __field(    u64,            clk_rate    )
0909     ),
0910     TP_fast_assign(
0911         __assign_str(dev_name, dev->unique);
0912         __entry->stop_req = stop_req;
0913         __entry->clk_rate = clk_rate;
0914     ),
0915     TP_printk("dev:%s stop_req:%s clk_rate:%llu", __get_str(dev_name),
0916           __entry->stop_req ? "true" : "false", __entry->clk_rate)
0917 );
0918 
0919 TRACE_EVENT(dpu_hw_ctl_update_pending_flush,
0920     TP_PROTO(u32 new_bits, u32 pending_mask),
0921     TP_ARGS(new_bits, pending_mask),
0922     TP_STRUCT__entry(
0923         __field(    u32,            new_bits    )
0924         __field(    u32,            pending_mask    )
0925     ),
0926     TP_fast_assign(
0927         __entry->new_bits = new_bits;
0928         __entry->pending_mask = pending_mask;
0929     ),
0930     TP_printk("new=%x existing=%x", __entry->new_bits,
0931           __entry->pending_mask)
0932 );
0933 
0934 DECLARE_EVENT_CLASS(dpu_hw_ctl_pending_flush_template,
0935     TP_PROTO(u32 pending_mask, u32 ctl_flush),
0936     TP_ARGS(pending_mask, ctl_flush),
0937     TP_STRUCT__entry(
0938         __field(    u32,            pending_mask    )
0939         __field(    u32,            ctl_flush   )
0940     ),
0941     TP_fast_assign(
0942         __entry->pending_mask = pending_mask;
0943         __entry->ctl_flush = ctl_flush;
0944     ),
0945     TP_printk("pending_mask=%x CTL_FLUSH=%x", __entry->pending_mask,
0946           __entry->ctl_flush)
0947 );
0948 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_clear_pending_flush,
0949     TP_PROTO(u32 pending_mask, u32 ctl_flush),
0950     TP_ARGS(pending_mask, ctl_flush)
0951 );
0952 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template,
0953          dpu_hw_ctl_trigger_pending_flush,
0954     TP_PROTO(u32 pending_mask, u32 ctl_flush),
0955     TP_ARGS(pending_mask, ctl_flush)
0956 );
0957 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_prepare,
0958     TP_PROTO(u32 pending_mask, u32 ctl_flush),
0959     TP_ARGS(pending_mask, ctl_flush)
0960 );
0961 DEFINE_EVENT(dpu_hw_ctl_pending_flush_template, dpu_hw_ctl_trigger_start,
0962     TP_PROTO(u32 pending_mask, u32 ctl_flush),
0963     TP_ARGS(pending_mask, ctl_flush)
0964 );
0965 
0966 #define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0)
0967 #define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1)
0968 #define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__)
0969 
0970 #define DPU_ATRACE_INT(name, value) \
0971     trace_dpu_trace_counter(current->tgid, name, value)
0972 
0973 #endif /* _DPU_TRACE_H_ */
0974 
0975 /* This part must be outside protection */
0976 #undef TRACE_INCLUDE_PATH
0977 #define TRACE_INCLUDE_PATH .
0978 #include <trace/define_trace.h>
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