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0008 #ifndef __DPU_KMS_H__
0009 #define __DPU_KMS_H__
0010
0011 #include <linux/interconnect.h>
0012
0013 #include <drm/drm_drv.h>
0014
0015 #include "msm_drv.h"
0016 #include "msm_kms.h"
0017 #include "msm_mmu.h"
0018 #include "msm_gem.h"
0019 #include "dpu_hw_catalog.h"
0020 #include "dpu_hw_ctl.h"
0021 #include "dpu_hw_lm.h"
0022 #include "dpu_hw_interrupts.h"
0023 #include "dpu_hw_top.h"
0024 #include "dpu_rm.h"
0025 #include "dpu_core_perf.h"
0026
0027 #define DRMID(x) ((x) ? (x)->base.id : -1)
0028
0029
0030
0031
0032
0033 #define DPU_DEBUG(fmt, ...) \
0034 do { \
0035 if (drm_debug_enabled(DRM_UT_KMS)) \
0036 DRM_DEBUG(fmt, ##__VA_ARGS__); \
0037 else \
0038 pr_debug(fmt, ##__VA_ARGS__); \
0039 } while (0)
0040
0041
0042
0043
0044
0045 #define DPU_DEBUG_DRIVER(fmt, ...) \
0046 do { \
0047 if (drm_debug_enabled(DRM_UT_DRIVER)) \
0048 DRM_ERROR(fmt, ##__VA_ARGS__); \
0049 else \
0050 pr_debug(fmt, ##__VA_ARGS__); \
0051 } while (0)
0052
0053 #define DPU_ERROR(fmt, ...) pr_err("[dpu error]" fmt, ##__VA_ARGS__)
0054
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0062
0063 #define ktime_compare_safe(A, B) \
0064 ktime_compare(ktime_sub((A), (B)), ktime_set(0, 0))
0065
0066 #define DPU_NAME_SIZE 12
0067
0068 struct dpu_kms {
0069 struct msm_kms base;
0070 struct drm_device *dev;
0071 int core_rev;
0072 const struct dpu_mdss_cfg *catalog;
0073
0074
0075 void __iomem *mmio, *vbif[VBIF_MAX], *reg_dma;
0076
0077 struct regulator *vdd;
0078 struct regulator *mmagic;
0079 struct regulator *venus;
0080
0081 struct dpu_hw_intr *hw_intr;
0082
0083 struct dpu_core_perf perf;
0084
0085
0086
0087
0088
0089 struct drm_modeset_lock global_state_lock;
0090 struct drm_private_obj global_state;
0091
0092 struct dpu_rm rm;
0093 bool rm_init;
0094
0095 struct dpu_hw_vbif *hw_vbif[VBIF_MAX];
0096 struct dpu_hw_mdp *hw_mdp;
0097
0098 bool has_danger_ctrl;
0099
0100 struct platform_device *pdev;
0101 bool rpm_enabled;
0102
0103 struct clk_bulk_data *clocks;
0104 size_t num_clocks;
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0110
0111
0112 atomic_t bandwidth_ref;
0113 struct icc_path *path[2];
0114 u32 num_paths;
0115 };
0116
0117 struct vsync_info {
0118 u32 frame_count;
0119 u32 line_count;
0120 };
0121
0122 #define to_dpu_kms(x) container_of(x, struct dpu_kms, base)
0123
0124 #define to_dpu_global_state(x) container_of(x, struct dpu_global_state, base)
0125
0126
0127
0128
0129 struct dpu_global_state {
0130 struct drm_private_state base;
0131
0132 uint32_t pingpong_to_enc_id[PINGPONG_MAX - PINGPONG_0];
0133 uint32_t mixer_to_enc_id[LM_MAX - LM_0];
0134 uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
0135 uint32_t dspp_to_enc_id[DSPP_MAX - DSPP_0];
0136 uint32_t dsc_to_enc_id[DSC_MAX - DSC_0];
0137 };
0138
0139 struct dpu_global_state
0140 *dpu_kms_get_existing_global_state(struct dpu_kms *dpu_kms);
0141 struct dpu_global_state
0142 *__must_check dpu_kms_get_global_state(struct drm_atomic_state *s);
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0169 void dpu_debugfs_create_regset32(const char *name, umode_t mode,
0170 void *parent,
0171 uint32_t offset, uint32_t length, struct dpu_kms *dpu_kms);
0172
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0183 void *dpu_debugfs_get_root(struct dpu_kms *dpu_kms);
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0189
0190 #define DPU_KMS_INFO_MAX_SIZE 4096
0191
0192
0193
0194
0195 int dpu_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
0196 void dpu_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc);
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0205 u64 dpu_kms_get_clk_rate(struct dpu_kms *dpu_kms, char *clock_name);
0206
0207 #endif