disp/dpu1/dpu_hw_top.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
0003  */
0004
0005 #ifndef _DPU_HW_TOP_H
0006 #define _DPU_HW_TOP_H
0007
0008 #include "dpu_hw_catalog.h"
0009 #include "dpu_hw_mdss.h"
0010 #include "dpu_hw_util.h"
0011
0012 struct dpu_hw_mdp;
0013
0014 /**
0015  * struct traffic_shaper_cfg: traffic shaper configuration
0016  * @en        : enable/disable traffic shaper
0017  * @rd_client : true if read client; false if write client
0018  * @client_id : client identifier
0019  * @bpc_denom : denominator of byte per clk
0020  * @bpc_numer : numerator of byte per clk
0021  */
0022 struct traffic_shaper_cfg {
0023     bool en;
0024     bool rd_client;
0025     u32 client_id;
0026     u32 bpc_denom;
0027     u64 bpc_numer;
0028 };
0029
0030 /**
0031  * struct split_pipe_cfg - pipe configuration for dual display panels
0032  * @en        : Enable/disable dual pipe configuration
0033  * @mode      : Panel interface mode
0034  * @intf      : Interface id for main control path
0035  * @split_flush_en: Allows both the paths to be flushed when master path is
0036  *              flushed
0037  */
0038 struct split_pipe_cfg {
0039     bool en;
0040     enum dpu_intf_mode mode;
0041     enum dpu_intf intf;
0042     bool split_flush_en;
0043 };
0044
0045 /**
0046  * struct dpu_danger_safe_status: danger and safe status signals
0047  * @mdp: top level status
0048  * @sspp: source pipe status
0049  */
0050 struct dpu_danger_safe_status {
0051     u8 mdp;
0052     u8 sspp[SSPP_MAX];
0053 };
0054
0055 /**
0056  * struct dpu_vsync_source_cfg - configure vsync source and configure the
0057  *                                    watchdog timers if required.
0058  * @pp_count: number of ping pongs active
0059  * @frame_rate: Display frame rate
0060  * @ppnumber: ping pong index array
0061  * @vsync_source: vsync source selection
0062  */
0063 struct dpu_vsync_source_cfg {
0064     u32 pp_count;
0065     u32 frame_rate;
0066     u32 ppnumber[PINGPONG_MAX];
0067     u32 vsync_source;
0068 };
0069
0070 /**
0071  * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions
0072  * Assumption is these functions will be called after clocks are enabled.
0073  * @setup_split_pipe : Programs the pipe control registers
0074  * @setup_pp_split : Programs the pp split control registers
0075  * @setup_traffic_shaper : programs traffic shaper control
0076  */
0077 struct dpu_hw_mdp_ops {
0078     /** setup_split_pipe() : Registers are not double buffered, thisk
0079      * function should be called before timing control enable
0080      * @mdp  : mdp top context driver
0081      * @cfg  : upper and lower part of pipe configuration
0082      */
0083     void (*setup_split_pipe)(struct dpu_hw_mdp *mdp,
0084             struct split_pipe_cfg *p);
0085
0086     /**
0087      * setup_traffic_shaper() : Setup traffic shaper control
0088      * @mdp  : mdp top context driver
0089      * @cfg  : traffic shaper configuration
0090      */
0091     void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp,
0092             struct traffic_shaper_cfg *cfg);
0093
0094     /**
0095      * setup_clk_force_ctrl - set clock force control
0096      * @mdp: mdp top context driver
0097      * @clk_ctrl: clock to be controlled
0098      * @enable: force on enable
0099      * @return: if the clock is forced-on by this function
0100      */
0101     bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp,
0102             enum dpu_clk_ctrl_type clk_ctrl, bool enable);
0103
0104     /**
0105      * get_danger_status - get danger status
0106      * @mdp: mdp top context driver
0107      * @status: Pointer to danger safe status
0108      */
0109     void (*get_danger_status)(struct dpu_hw_mdp *mdp,
0110             struct dpu_danger_safe_status *status);
0111
0112     /**
0113      * setup_vsync_source - setup vsync source configuration details
0114      * @mdp: mdp top context driver
0115      * @cfg: vsync source selection configuration
0116      */
0117     void (*setup_vsync_source)(struct dpu_hw_mdp *mdp,
0118                 struct dpu_vsync_source_cfg *cfg);
0119
0120     /**
0121      * get_safe_status - get safe status
0122      * @mdp: mdp top context driver
0123      * @status: Pointer to danger safe status
0124      */
0125     void (*get_safe_status)(struct dpu_hw_mdp *mdp,
0126             struct dpu_danger_safe_status *status);
0127
0128     /**
0129      * intf_audio_select - select the external interface for audio
0130      * @mdp: mdp top context driver
0131      */
0132     void (*intf_audio_select)(struct dpu_hw_mdp *mdp);
0133 };
0134
0135 struct dpu_hw_mdp {
0136     struct dpu_hw_blk base;
0137     struct dpu_hw_blk_reg_map hw;
0138
0139     /* top */
0140     enum dpu_mdp idx;
0141     const struct dpu_mdp_cfg *caps;
0142
0143     /* ops */
0144     struct dpu_hw_mdp_ops ops;
0145 };
0146
0147 /**
0148  * dpu_hw_mdptop_init - initializes the top driver for the passed idx
0149  * @idx:  Interface index for which driver object is required
0150  * @addr: Mapped register io address of MDP
0151  * @m:    Pointer to mdss catalog data
0152  */
0153 struct dpu_hw_mdp *dpu_hw_mdptop_init(enum dpu_mdp idx,
0154         void __iomem *addr,
0155         const struct dpu_mdss_cfg *m);
0156
0157 void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp);
0158
0159 #endif /*_DPU_HW_TOP_H */