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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
0003  */
0004 
0005 #ifndef _DPU_HW_INTERRUPTS_H
0006 #define _DPU_HW_INTERRUPTS_H
0007 
0008 #include <linux/types.h>
0009 
0010 #include "dpu_hwio.h"
0011 #include "dpu_hw_catalog.h"
0012 #include "dpu_hw_util.h"
0013 #include "dpu_hw_mdss.h"
0014 
0015 /* When making changes be sure to sync with dpu_intr_set */
0016 enum dpu_hw_intr_reg {
0017     MDP_SSPP_TOP0_INTR,
0018     MDP_SSPP_TOP0_INTR2,
0019     MDP_SSPP_TOP0_HIST_INTR,
0020     MDP_INTF0_INTR,
0021     MDP_INTF1_INTR,
0022     MDP_INTF2_INTR,
0023     MDP_INTF3_INTR,
0024     MDP_INTF4_INTR,
0025     MDP_INTF5_INTR,
0026     MDP_AD4_0_INTR,
0027     MDP_AD4_1_INTR,
0028     MDP_INTF0_7xxx_INTR,
0029     MDP_INTF1_7xxx_INTR,
0030     MDP_INTF2_7xxx_INTR,
0031     MDP_INTF3_7xxx_INTR,
0032     MDP_INTF4_7xxx_INTR,
0033     MDP_INTF5_7xxx_INTR,
0034     MDP_INTR_MAX,
0035 };
0036 
0037 #define DPU_IRQ_IDX(reg_idx, offset)    (reg_idx * 32 + offset)
0038 
0039 /**
0040  * struct dpu_hw_intr: hw interrupts handling data structure
0041  * @hw:               virtual address mapping
0042  * @ops:              function pointer mapping for IRQ handling
0043  * @cache_irq_mask:   array of IRQ enable masks reg storage created during init
0044  * @save_irq_status:  array of IRQ status reg storage created during init
0045  * @total_irqs: total number of irq_idx mapped in the hw_interrupts
0046  * @irq_lock:         spinlock for accessing IRQ resources
0047  * @irq_cb_tbl:       array of IRQ callbacks
0048  */
0049 struct dpu_hw_intr {
0050     struct dpu_hw_blk_reg_map hw;
0051     u32 cache_irq_mask[MDP_INTR_MAX];
0052     u32 *save_irq_status;
0053     u32 total_irqs;
0054     spinlock_t irq_lock;
0055     unsigned long irq_mask;
0056 
0057     struct {
0058         void (*cb)(void *arg, int irq_idx);
0059         void *arg;
0060         atomic_t count;
0061     } irq_tbl[];
0062 };
0063 
0064 /**
0065  * dpu_hw_intr_init(): Initializes the interrupts hw object
0066  * @addr: mapped register io address of MDP
0067  * @m :   pointer to mdss catalog data
0068  */
0069 struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
0070         const struct dpu_mdss_cfg *m);
0071 
0072 /**
0073  * dpu_hw_intr_destroy(): Cleanup interrutps hw object
0074  * @intr: pointer to interrupts hw object
0075  */
0076 void dpu_hw_intr_destroy(struct dpu_hw_intr *intr);
0077 #endif