0001
0002 ccflags-y := -I $(srctree)/$(src)
0003 ccflags-y += -I $(srctree)/$(src)/disp/dpu1
0004 ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi
0005 ccflags-$(CONFIG_DRM_MSM_DP) += -I $(srctree)/$(src)/dp
0006
0007 msm-y := \
0008 adreno/adreno_device.o \
0009 adreno/adreno_gpu.o \
0010 adreno/a2xx_gpu.o \
0011 adreno/a3xx_gpu.o \
0012 adreno/a4xx_gpu.o \
0013 adreno/a5xx_gpu.o \
0014 adreno/a5xx_power.o \
0015 adreno/a5xx_preempt.o \
0016 adreno/a6xx_gpu.o \
0017 adreno/a6xx_gmu.o \
0018 adreno/a6xx_hfi.o \
0019
0020 msm-$(CONFIG_DRM_MSM_HDMI) += \
0021 hdmi/hdmi.o \
0022 hdmi/hdmi_audio.o \
0023 hdmi/hdmi_bridge.o \
0024 hdmi/hdmi_hpd.o \
0025 hdmi/hdmi_i2c.o \
0026 hdmi/hdmi_phy.o \
0027 hdmi/hdmi_phy_8960.o \
0028 hdmi/hdmi_phy_8996.o \
0029 hdmi/hdmi_phy_8x60.o \
0030 hdmi/hdmi_phy_8x74.o \
0031 hdmi/hdmi_pll_8960.o \
0032
0033 msm-$(CONFIG_DRM_MSM_MDP4) += \
0034 disp/mdp4/mdp4_crtc.o \
0035 disp/mdp4/mdp4_dsi_encoder.o \
0036 disp/mdp4/mdp4_dtv_encoder.o \
0037 disp/mdp4/mdp4_lcdc_encoder.o \
0038 disp/mdp4/mdp4_lvds_connector.o \
0039 disp/mdp4/mdp4_lvds_pll.o \
0040 disp/mdp4/mdp4_irq.o \
0041 disp/mdp4/mdp4_kms.o \
0042 disp/mdp4/mdp4_plane.o \
0043
0044 msm-$(CONFIG_DRM_MSM_MDP5) += \
0045 disp/mdp5/mdp5_cfg.o \
0046 disp/mdp5/mdp5_cmd_encoder.o \
0047 disp/mdp5/mdp5_ctl.o \
0048 disp/mdp5/mdp5_crtc.o \
0049 disp/mdp5/mdp5_encoder.o \
0050 disp/mdp5/mdp5_irq.o \
0051 disp/mdp5/mdp5_kms.o \
0052 disp/mdp5/mdp5_pipe.o \
0053 disp/mdp5/mdp5_mixer.o \
0054 disp/mdp5/mdp5_plane.o \
0055 disp/mdp5/mdp5_smp.o \
0056
0057 msm-$(CONFIG_DRM_MSM_DPU) += \
0058 disp/dpu1/dpu_core_perf.o \
0059 disp/dpu1/dpu_crtc.o \
0060 disp/dpu1/dpu_encoder.o \
0061 disp/dpu1/dpu_encoder_phys_cmd.o \
0062 disp/dpu1/dpu_encoder_phys_vid.o \
0063 disp/dpu1/dpu_encoder_phys_wb.o \
0064 disp/dpu1/dpu_formats.o \
0065 disp/dpu1/dpu_hw_catalog.o \
0066 disp/dpu1/dpu_hw_ctl.o \
0067 disp/dpu1/dpu_hw_dsc.o \
0068 disp/dpu1/dpu_hw_interrupts.o \
0069 disp/dpu1/dpu_hw_intf.o \
0070 disp/dpu1/dpu_hw_lm.o \
0071 disp/dpu1/dpu_hw_pingpong.o \
0072 disp/dpu1/dpu_hw_sspp.o \
0073 disp/dpu1/dpu_hw_dspp.o \
0074 disp/dpu1/dpu_hw_merge3d.o \
0075 disp/dpu1/dpu_hw_top.o \
0076 disp/dpu1/dpu_hw_util.o \
0077 disp/dpu1/dpu_hw_vbif.o \
0078 disp/dpu1/dpu_hw_wb.o \
0079 disp/dpu1/dpu_kms.o \
0080 disp/dpu1/dpu_plane.o \
0081 disp/dpu1/dpu_rm.o \
0082 disp/dpu1/dpu_vbif.o \
0083 disp/dpu1/dpu_writeback.o
0084
0085 msm-$(CONFIG_DRM_MSM_MDSS) += \
0086 msm_mdss.o \
0087
0088 msm-y += \
0089 disp/mdp_format.o \
0090 disp/mdp_kms.o \
0091 disp/msm_disp_snapshot.o \
0092 disp/msm_disp_snapshot_util.o \
0093 msm_atomic.o \
0094 msm_atomic_tracepoints.o \
0095 msm_debugfs.o \
0096 msm_drv.o \
0097 msm_fb.o \
0098 msm_fence.o \
0099 msm_gem.o \
0100 msm_gem_prime.o \
0101 msm_gem_shrinker.o \
0102 msm_gem_submit.o \
0103 msm_gem_vma.o \
0104 msm_gpu.o \
0105 msm_gpu_devfreq.o \
0106 msm_io_utils.o \
0107 msm_iommu.o \
0108 msm_perf.o \
0109 msm_rd.o \
0110 msm_ringbuffer.o \
0111 msm_submitqueue.o \
0112 msm_gpu_tracepoints.o \
0113 msm_gpummu.o
0114
0115 msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \
0116 dp/dp_debug.o
0117
0118 msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o
0119
0120 msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \
0121 dp/dp_catalog.o \
0122 dp/dp_ctrl.o \
0123 dp/dp_display.o \
0124 dp/dp_drm.o \
0125 dp/dp_hpd.o \
0126 dp/dp_link.o \
0127 dp/dp_panel.o \
0128 dp/dp_parser.o \
0129 dp/dp_power.o \
0130 dp/dp_audio.o
0131
0132 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
0133
0134 msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
0135
0136 msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
0137 dsi/dsi_cfg.o \
0138 dsi/dsi_host.o \
0139 dsi/dsi_manager.o \
0140 dsi/phy/dsi_phy.o
0141
0142 msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
0143 msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
0144 msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
0145 msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
0146 msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
0147 msm-$(CONFIG_DRM_MSM_DSI_7NM_PHY) += dsi/phy/dsi_phy_7nm.o
0148
0149 obj-$(CONFIG_DRM_MSM) += msm.o