drm/meson/meson_encoder_hdmi.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2016 BayLibre, SAS
0004  * Author: Neil Armstrong <narmstrong@baylibre.com>
0005  * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
0006  */
0007
0008 #include <linux/clk.h>
0009 #include <linux/component.h>
0010 #include <linux/kernel.h>
0011 #include <linux/module.h>
0012 #include <linux/of_device.h>
0013 #include <linux/of_graph.h>
0014 #include <linux/regulator/consumer.h>
0015 #include <linux/reset.h>
0016
0017 #include <media/cec-notifier.h>
0018
0019 #include <drm/drm_atomic_helper.h>
0020 #include <drm/drm_bridge.h>
0021 #include <drm/drm_bridge_connector.h>
0022 #include <drm/drm_device.h>
0023 #include <drm/drm_edid.h>
0024 #include <drm/drm_probe_helper.h>
0025 #include <drm/drm_simple_kms_helper.h>
0026
0027 #include <linux/media-bus-format.h>
0028 #include <linux/videodev2.h>
0029
0030 #include "meson_drv.h"
0031 #include "meson_registers.h"
0032 #include "meson_vclk.h"
0033 #include "meson_venc.h"
0034 #include "meson_encoder_hdmi.h"
0035
0036 struct meson_encoder_hdmi {
0037     struct drm_encoder encoder;
0038     struct drm_bridge bridge;
0039     struct drm_bridge *next_bridge;
0040     struct drm_connector *connector;
0041     struct meson_drm *priv;
0042     unsigned long output_bus_fmt;
0043     struct cec_notifier *cec_notifier;
0044 };
0045
0046 #define bridge_to_meson_encoder_hdmi(x) \
0047     container_of(x, struct meson_encoder_hdmi, bridge)
0048
0049 static int meson_encoder_hdmi_attach(struct drm_bridge *bridge,
0050                      enum drm_bridge_attach_flags flags)
0051 {
0052     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0053
0054     return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge,
0055                  &encoder_hdmi->bridge, flags);
0056 }
0057
0058 static void meson_encoder_hdmi_detach(struct drm_bridge *bridge)
0059 {
0060     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0061
0062     cec_notifier_conn_unregister(encoder_hdmi->cec_notifier);
0063     encoder_hdmi->cec_notifier = NULL;
0064 }
0065
0066 static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
0067                     const struct drm_display_mode *mode)
0068 {
0069     struct meson_drm *priv = encoder_hdmi->priv;
0070     int vic = drm_match_cea_mode(mode);
0071     unsigned int phy_freq;
0072     unsigned int vclk_freq;
0073     unsigned int venc_freq;
0074     unsigned int hdmi_freq;
0075
0076     vclk_freq = mode->clock;
0077
0078     /* For 420, pixel clock is half unlike venc clock */
0079     if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
0080         vclk_freq /= 2;
0081
0082     /* TMDS clock is pixel_clock * 10 */
0083     phy_freq = vclk_freq * 10;
0084
0085     if (!vic) {
0086         meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
0087                  vclk_freq, vclk_freq, vclk_freq, false);
0088         return;
0089     }
0090
0091     /* 480i/576i needs global pixel doubling */
0092     if (mode->flags & DRM_MODE_FLAG_DBLCLK)
0093         vclk_freq *= 2;
0094
0095     venc_freq = vclk_freq;
0096     hdmi_freq = vclk_freq;
0097
0098     /* VENC double pixels for 1080i, 720p and YUV420 modes */
0099     if (meson_venc_hdmi_venc_repeat(vic) ||
0100         encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
0101         venc_freq *= 2;
0102
0103     vclk_freq = max(venc_freq, hdmi_freq);
0104
0105     if (mode->flags & DRM_MODE_FLAG_DBLCLK)
0106         venc_freq /= 2;
0107
0108     dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
0109         phy_freq, vclk_freq, venc_freq, hdmi_freq,
0110         priv->venc.hdmi_use_enci);
0111
0112     meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
0113              venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
0114 }
0115
0116 static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
0117                     const struct drm_display_info *display_info,
0118                     const struct drm_display_mode *mode)
0119 {
0120     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0121     struct meson_drm *priv = encoder_hdmi->priv;
0122     bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
0123     unsigned int phy_freq;
0124     unsigned int vclk_freq;
0125     unsigned int venc_freq;
0126     unsigned int hdmi_freq;
0127     int vic = drm_match_cea_mode(mode);
0128     enum drm_mode_status status;
0129
0130     dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
0131
0132     /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */
0133     if (display_info->max_tmds_clock &&
0134         mode->clock > display_info->max_tmds_clock &&
0135         !drm_mode_is_420_only(display_info, mode) &&
0136         !drm_mode_is_420_also(display_info, mode))
0137         return MODE_BAD;
0138
0139     /* Check against non-VIC supported modes */
0140     if (!vic) {
0141         status = meson_venc_hdmi_supported_mode(mode);
0142         if (status != MODE_OK)
0143             return status;
0144
0145         return meson_vclk_dmt_supported_freq(priv, mode->clock);
0146     /* Check against supported VIC modes */
0147     } else if (!meson_venc_hdmi_supported_vic(vic))
0148         return MODE_BAD;
0149
0150     vclk_freq = mode->clock;
0151
0152     /* For 420, pixel clock is half unlike venc clock */
0153     if (drm_mode_is_420_only(display_info, mode) ||
0154         (!is_hdmi2_sink &&
0155          drm_mode_is_420_also(display_info, mode)))
0156         vclk_freq /= 2;
0157
0158     /* TMDS clock is pixel_clock * 10 */
0159     phy_freq = vclk_freq * 10;
0160
0161     /* 480i/576i needs global pixel doubling */
0162     if (mode->flags & DRM_MODE_FLAG_DBLCLK)
0163         vclk_freq *= 2;
0164
0165     venc_freq = vclk_freq;
0166     hdmi_freq = vclk_freq;
0167
0168     /* VENC double pixels for 1080i, 720p and YUV420 modes */
0169     if (meson_venc_hdmi_venc_repeat(vic) ||
0170         drm_mode_is_420_only(display_info, mode) ||
0171         (!is_hdmi2_sink &&
0172          drm_mode_is_420_also(display_info, mode)))
0173         venc_freq *= 2;
0174
0175     vclk_freq = max(venc_freq, hdmi_freq);
0176
0177     if (mode->flags & DRM_MODE_FLAG_DBLCLK)
0178         venc_freq /= 2;
0179
0180     dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
0181         __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
0182
0183     return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
0184 }
0185
0186 static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
0187                          struct drm_bridge_state *bridge_state)
0188 {
0189     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0190     struct drm_atomic_state *state = bridge_state->base.state;
0191     unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR;
0192     struct meson_drm *priv = encoder_hdmi->priv;
0193     struct drm_connector_state *conn_state;
0194     const struct drm_display_mode *mode;
0195     struct drm_crtc_state *crtc_state;
0196     struct drm_connector *connector;
0197     bool yuv420_mode = false;
0198     int vic;
0199
0200     connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
0201     if (WARN_ON(!connector))
0202         return;
0203
0204     conn_state = drm_atomic_get_new_connector_state(state, connector);
0205     if (WARN_ON(!conn_state))
0206         return;
0207
0208     crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
0209     if (WARN_ON(!crtc_state))
0210         return;
0211
0212     mode = &crtc_state->adjusted_mode;
0213
0214     vic = drm_match_cea_mode(mode);
0215
0216     dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic);
0217
0218     if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {
0219         ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
0220         yuv420_mode = true;
0221     } else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
0222         ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
0223
0224     /* VENC + VENC-DVI Mode setup */
0225     meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);
0226
0227     /* VCLK Set clock */
0228     meson_encoder_hdmi_set_vclk(encoder_hdmi, mode);
0229
0230     if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
0231         /* Setup YUV420 to HDMI-TX, no 10bit diphering */
0232         writel_relaxed(2 | (2 << 2),
0233                    priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
0234     else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
0235         /* Setup YUV422 to HDMI-TX, no 10bit diphering */
0236         writel_relaxed(1 | (2 << 2),
0237                 priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
0238     else
0239         /* Setup YUV444 to HDMI-TX, no 10bit diphering */
0240         writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
0241
0242     dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP");
0243
0244     if (priv->venc.hdmi_use_enci)
0245         writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));
0246     else
0247         writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
0248 }
0249
0250 static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,
0251                          struct drm_bridge_state *bridge_state)
0252 {
0253     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0254     struct meson_drm *priv = encoder_hdmi->priv;
0255
0256     writel_bits_relaxed(0x3, 0,
0257                 priv->io_base + _REG(VPU_HDMI_SETTING));
0258
0259     writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
0260     writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
0261 }
0262
0263 static const u32 meson_encoder_hdmi_out_bus_fmts[] = {
0264     MEDIA_BUS_FMT_YUV8_1X24,
0265     MEDIA_BUS_FMT_UYVY8_1X16,
0266     MEDIA_BUS_FMT_UYYVYY8_0_5X24,
0267 };
0268
0269 static u32 *
0270 meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge,
0271                     struct drm_bridge_state *bridge_state,
0272                     struct drm_crtc_state *crtc_state,
0273                     struct drm_connector_state *conn_state,
0274                     u32 output_fmt,
0275                     unsigned int *num_input_fmts)
0276 {
0277     u32 *input_fmts = NULL;
0278     int i;
0279
0280     *num_input_fmts = 0;
0281
0282     for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) {
0283         if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) {
0284             *num_input_fmts = 1;
0285             input_fmts = kcalloc(*num_input_fmts,
0286                          sizeof(*input_fmts),
0287                          GFP_KERNEL);
0288             if (!input_fmts)
0289                 return NULL;
0290
0291             input_fmts[0] = output_fmt;
0292
0293             break;
0294         }
0295     }
0296
0297     return input_fmts;
0298 }
0299
0300 static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge,
0301                     struct drm_bridge_state *bridge_state,
0302                     struct drm_crtc_state *crtc_state,
0303                     struct drm_connector_state *conn_state)
0304 {
0305     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0306     struct drm_connector_state *old_conn_state =
0307         drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector);
0308     struct meson_drm *priv = encoder_hdmi->priv;
0309
0310     encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format;
0311
0312     dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt);
0313
0314     if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state))
0315         crtc_state->mode_changed = true;
0316
0317     return 0;
0318 }
0319
0320 static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge,
0321                       enum drm_connector_status status)
0322 {
0323     struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
0324     struct edid *edid;
0325
0326     if (!encoder_hdmi->cec_notifier)
0327         return;
0328
0329     if (status == connector_status_connected) {
0330         edid = drm_bridge_get_edid(encoder_hdmi->next_bridge, encoder_hdmi->connector);
0331         if (!edid)
0332             return;
0333
0334         cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);
0335     } else
0336         cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);
0337 }
0338
0339 static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = {
0340     .attach = meson_encoder_hdmi_attach,
0341     .detach = meson_encoder_hdmi_detach,
0342     .mode_valid = meson_encoder_hdmi_mode_valid,
0343     .hpd_notify = meson_encoder_hdmi_hpd_notify,
0344     .atomic_enable = meson_encoder_hdmi_atomic_enable,
0345     .atomic_disable = meson_encoder_hdmi_atomic_disable,
0346     .atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts,
0347     .atomic_check = meson_encoder_hdmi_atomic_check,
0348     .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
0349     .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
0350     .atomic_reset = drm_atomic_helper_bridge_reset,
0351 };
0352
0353 int meson_encoder_hdmi_init(struct meson_drm *priv)
0354 {
0355     struct meson_encoder_hdmi *meson_encoder_hdmi;
0356     struct platform_device *pdev;
0357     struct device_node *remote;
0358     int ret;
0359
0360     meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL);
0361     if (!meson_encoder_hdmi)
0362         return -ENOMEM;
0363
0364     /* HDMI Transceiver Bridge */
0365     remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0);
0366     if (!remote) {
0367         dev_err(priv->dev, "HDMI transceiver device is disabled");
0368         return 0;
0369     }
0370
0371     meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote);
0372     if (!meson_encoder_hdmi->next_bridge) {
0373         dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n");
0374         ret = -EPROBE_DEFER;
0375         goto err_put_node;
0376     }
0377
0378     /* HDMI Encoder Bridge */
0379     meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs;
0380     meson_encoder_hdmi->bridge.of_node = priv->dev->of_node;
0381     meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
0382     meson_encoder_hdmi->bridge.interlace_allowed = true;
0383
0384     drm_bridge_add(&meson_encoder_hdmi->bridge);
0385
0386     meson_encoder_hdmi->priv = priv;
0387
0388     /* Encoder */
0389     ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder,
0390                       DRM_MODE_ENCODER_TMDS);
0391     if (ret) {
0392         dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret);
0393         goto err_put_node;
0394     }
0395
0396     meson_encoder_hdmi->encoder.possible_crtcs = BIT(0);
0397
0398     /* Attach HDMI Encoder Bridge to Encoder */
0399     ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL,
0400                 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
0401     if (ret) {
0402         dev_err(priv->dev, "Failed to attach bridge: %d\n", ret);
0403         goto err_put_node;
0404     }
0405
0406     /* Initialize & attach Bridge Connector */
0407     meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm,
0408                             &meson_encoder_hdmi->encoder);
0409     if (IS_ERR(meson_encoder_hdmi->connector)) {
0410         dev_err(priv->dev, "Unable to create HDMI bridge connector\n");
0411         ret = PTR_ERR(meson_encoder_hdmi->connector);
0412         goto err_put_node;
0413     }
0414     drm_connector_attach_encoder(meson_encoder_hdmi->connector,
0415                      &meson_encoder_hdmi->encoder);
0416
0417     /*
0418      * We should have now in place:
0419      * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector]
0420      */
0421
0422     /*
0423      * drm_connector_attach_max_bpc_property() requires the
0424      * connector to have a state.
0425      */
0426     drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector);
0427
0428     if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) ||
0429         meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
0430         meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
0431         drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector);
0432
0433     drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8);
0434
0435     /* Handle this here until handled by drm_bridge_connector_init() */
0436     meson_encoder_hdmi->connector->ycbcr_420_allowed = true;
0437
0438     pdev = of_find_device_by_node(remote);
0439     of_node_put(remote);
0440     if (pdev) {
0441         struct cec_connector_info conn_info;
0442         struct cec_notifier *notifier;
0443
0444         cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector);
0445
0446         notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info);
0447         if (!notifier) {
0448             put_device(&pdev->dev);
0449             return -ENOMEM;
0450         }
0451
0452         meson_encoder_hdmi->cec_notifier = notifier;
0453     }
0454
0455     dev_dbg(priv->dev, "HDMI encoder initialized\n");
0456
0457     return 0;
0458
0459 err_put_node:
0460     of_node_put(remote);
0461     return ret;
0462 }