drm/mediatek/mtk_disp_ccorr.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2021 MediaTek Inc.
0004  */
0005
0006 #include <linux/clk.h>
0007 #include <linux/component.h>
0008 #include <linux/module.h>
0009 #include <linux/of_device.h>
0010 #include <linux/of_irq.h>
0011 #include <linux/platform_device.h>
0012 #include <linux/soc/mediatek/mtk-cmdq.h>
0013
0014 #include "mtk_disp_drv.h"
0015 #include "mtk_drm_crtc.h"
0016 #include "mtk_drm_ddp_comp.h"
0017
0018 #define DISP_CCORR_EN               0x0000
0019 #define CCORR_EN                    BIT(0)
0020 #define DISP_CCORR_CFG              0x0020
0021 #define CCORR_RELAY_MODE                BIT(0)
0022 #define CCORR_ENGINE_EN                 BIT(1)
0023 #define CCORR_GAMMA_OFF                 BIT(2)
0024 #define CCORR_WGAMUT_SRC_CLIP               BIT(3)
0025 #define DISP_CCORR_SIZE             0x0030
0026 #define DISP_CCORR_COEF_0           0x0080
0027 #define DISP_CCORR_COEF_1           0x0084
0028 #define DISP_CCORR_COEF_2           0x0088
0029 #define DISP_CCORR_COEF_3           0x008C
0030 #define DISP_CCORR_COEF_4           0x0090
0031
0032 struct mtk_disp_ccorr_data {
0033     u32 matrix_bits;
0034 };
0035
0036 /**
0037  * struct mtk_disp_ccorr - DISP_CCORR driver structure
0038  * @ddp_comp - structure containing type enum and hardware resources
0039  * @crtc - associated crtc to report irq events to
0040  */
0041 struct mtk_disp_ccorr {
0042     struct clk *clk;
0043     void __iomem *regs;
0044     struct cmdq_client_reg cmdq_reg;
0045     const struct mtk_disp_ccorr_data    *data;
0046 };
0047
0048 int mtk_ccorr_clk_enable(struct device *dev)
0049 {
0050     struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
0051
0052     return clk_prepare_enable(ccorr->clk);
0053 }
0054
0055 void mtk_ccorr_clk_disable(struct device *dev)
0056 {
0057     struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
0058
0059     clk_disable_unprepare(ccorr->clk);
0060 }
0061
0062 void mtk_ccorr_config(struct device *dev, unsigned int w,
0063                  unsigned int h, unsigned int vrefresh,
0064                  unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
0065 {
0066     struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
0067
0068     mtk_ddp_write(cmdq_pkt, w << 16 | h, &ccorr->cmdq_reg, ccorr->regs,
0069               DISP_CCORR_SIZE);
0070     mtk_ddp_write(cmdq_pkt, CCORR_ENGINE_EN, &ccorr->cmdq_reg, ccorr->regs,
0071               DISP_CCORR_CFG);
0072 }
0073
0074 void mtk_ccorr_start(struct device *dev)
0075 {
0076     struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
0077
0078     writel(CCORR_EN, ccorr->regs + DISP_CCORR_EN);
0079 }
0080
0081 void mtk_ccorr_stop(struct device *dev)
0082 {
0083     struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
0084
0085     writel_relaxed(0x0, ccorr->regs + DISP_CCORR_EN);
0086 }
0087
0088 /* Converts a DRM S31.32 value to the HW S1.n format. */
0089 static u16 mtk_ctm_s31_32_to_s1_n(u64 in, u32 n)
0090 {
0091     u16 r;
0092
0093     /* Sign bit. */
0094     r = in & BIT_ULL(63) ? BIT(n + 1) : 0;
0095
0096     if ((in & GENMASK_ULL(62, 33)) > 0) {
0097         /* identity value 0x100000000 -> 0x400(mt8183), */
0098         /* identity value 0x100000000 -> 0x800(mt8192), */
0099         /* if bigger this, set it to max 0x7ff. */
0100         r |= GENMASK(n, 0);
0101     } else {
0102         /* take the n+1 most important bits. */
0103         r |= (in >> (32 - n)) & GENMASK(n, 0);
0104     }
0105
0106     return r;
0107 }
0108
0109 void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
0110 {
0111     struct mtk_disp_ccorr *ccorr = dev_get_drvdata(dev);
0112     struct drm_property_blob *blob = state->ctm;
0113     struct drm_color_ctm *ctm;
0114     const u64 *input;
0115     uint16_t coeffs[9] = { 0 };
0116     int i;
0117     struct cmdq_pkt *cmdq_pkt = NULL;
0118     u32 matrix_bits = ccorr->data->matrix_bits;
0119
0120     if (!blob)
0121         return;
0122
0123     ctm = (struct drm_color_ctm *)blob->data;
0124     input = ctm->matrix;
0125
0126     for (i = 0; i < ARRAY_SIZE(coeffs); i++)
0127         coeffs[i] = mtk_ctm_s31_32_to_s1_n(input[i], matrix_bits);
0128
0129     mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
0130               &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
0131     mtk_ddp_write(cmdq_pkt, coeffs[2] << 16 | coeffs[3],
0132               &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_1);
0133     mtk_ddp_write(cmdq_pkt, coeffs[4] << 16 | coeffs[5],
0134               &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_2);
0135     mtk_ddp_write(cmdq_pkt, coeffs[6] << 16 | coeffs[7],
0136               &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_3);
0137     mtk_ddp_write(cmdq_pkt, coeffs[8] << 16,
0138               &ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_4);
0139 }
0140
0141 static int mtk_disp_ccorr_bind(struct device *dev, struct device *master,
0142                    void *data)
0143 {
0144     return 0;
0145 }
0146
0147 static void mtk_disp_ccorr_unbind(struct device *dev, struct device *master,
0148                   void *data)
0149 {
0150 }
0151
0152 static const struct component_ops mtk_disp_ccorr_component_ops = {
0153     .bind   = mtk_disp_ccorr_bind,
0154     .unbind = mtk_disp_ccorr_unbind,
0155 };
0156
0157 static int mtk_disp_ccorr_probe(struct platform_device *pdev)
0158 {
0159     struct device *dev = &pdev->dev;
0160     struct mtk_disp_ccorr *priv;
0161     struct resource *res;
0162     int ret;
0163
0164     priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
0165     if (!priv)
0166         return -ENOMEM;
0167
0168     priv->clk = devm_clk_get(dev, NULL);
0169     if (IS_ERR(priv->clk)) {
0170         dev_err(dev, "failed to get ccorr clk\n");
0171         return PTR_ERR(priv->clk);
0172     }
0173
0174     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
0175     priv->regs = devm_ioremap_resource(dev, res);
0176     if (IS_ERR(priv->regs)) {
0177         dev_err(dev, "failed to ioremap ccorr\n");
0178         return PTR_ERR(priv->regs);
0179     }
0180
0181 #if IS_REACHABLE(CONFIG_MTK_CMDQ)
0182     ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
0183     if (ret)
0184         dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
0185 #endif
0186
0187     priv->data = of_device_get_match_data(dev);
0188     platform_set_drvdata(pdev, priv);
0189
0190     ret = component_add(dev, &mtk_disp_ccorr_component_ops);
0191     if (ret)
0192         dev_err(dev, "Failed to add component: %d\n", ret);
0193
0194     return ret;
0195 }
0196
0197 static int mtk_disp_ccorr_remove(struct platform_device *pdev)
0198 {
0199     component_del(&pdev->dev, &mtk_disp_ccorr_component_ops);
0200
0201     return 0;
0202 }
0203
0204 static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
0205     .matrix_bits = 10,
0206 };
0207
0208 static const struct mtk_disp_ccorr_data mt8192_ccorr_driver_data = {
0209     .matrix_bits = 11,
0210 };
0211
0212 static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
0213     { .compatible = "mediatek,mt8183-disp-ccorr",
0214       .data = &mt8183_ccorr_driver_data},
0215     { .compatible = "mediatek,mt8192-disp-ccorr",
0216       .data = &mt8192_ccorr_driver_data},
0217     {},
0218 };
0219 MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
0220
0221 struct platform_driver mtk_disp_ccorr_driver = {
0222     .probe      = mtk_disp_ccorr_probe,
0223     .remove     = mtk_disp_ccorr_remove,
0224     .driver     = {
0225         .name   = "mediatek-disp-ccorr",
0226         .owner  = THIS_MODULE,
0227         .of_match_table = mtk_disp_ccorr_driver_dt_match,
0228     },
0229 };