drm/mcde/mcde_drv.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2018 Linus Walleij <linus.walleij@linaro.org>
0004  * Parts of this file were based on the MCDE driver by Marcus Lorentzon
0005  * (C) ST-Ericsson SA 2013
0006  */
0007
0008 /**
0009  * DOC: ST-Ericsson MCDE Driver
0010  *
0011  * The MCDE (short for multi-channel display engine) is a graphics
0012  * controller found in the Ux500 chipsets, such as NovaThor U8500.
0013  * It was initially conceptualized by ST Microelectronics for the
0014  * successor of the Nomadik line, STn8500 but productified in the
0015  * ST-Ericsson U8500 where is was used for mass-market deployments
0016  * in Android phones from Samsung and Sony Ericsson.
0017  *
0018  * It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
0019  * panels with or without frame buffering and can convert most
0020  * input formats including most variants of RGB and YUV.
0021  *
0022  * The hardware has four display pipes, and the layout is a little
0023  * bit like this::
0024  *
0025  *   Memory     -> Overlay -> Channel -> FIFO -> 8 formatters -> DSI/DPI
0026  *   External      0..5       0..3       A,B,    6 x DSI         bridge
0027  *   source 0..9                         C0,C1   2 x DPI
0028  *
0029  * FIFOs A and B are for LCD and HDMI while FIFO CO/C1 are for
0030  * panels with embedded buffer.
0031  * 6 of the formatters are for DSI, 3 pairs for VID/CMD respectively.
0032  * 2 of the formatters are for DPI.
0033  *
0034  * Behind the formatters are the DSI or DPI ports that route to
0035  * the external pins of the chip. As there are 3 DSI ports and one
0036  * DPI port, it is possible to configure up to 4 display pipelines
0037  * (effectively using channels 0..3) for concurrent use.
0038  *
0039  * In the current DRM/KMS setup, we use one external source, one overlay,
0040  * one FIFO and one formatter which we connect to the simple CMA framebuffer
0041  * helpers. We then provide a bridge to the DSI port, and on the DSI port
0042  * bridge we connect hang a panel bridge or other bridge. This may be subject
0043  * to change as we exploit more of the hardware capabilities.
0044  *
0045  * TODO:
0046  *
0047  * - Enabled damaged rectangles using drm_plane_enable_fb_damage_clips()
0048  *   so we can selectively just transmit the damaged area to a
0049  *   command-only display.
0050  * - Enable mixing of more planes, possibly at the cost of moving away
0051  *   from using the simple framebuffer pipeline.
0052  * - Enable output to bridges such as the AV8100 HDMI encoder from
0053  *   the DSI bridge.
0054  */
0055
0056 #include <linux/clk.h>
0057 #include <linux/component.h>
0058 #include <linux/dma-buf.h>
0059 #include <linux/irq.h>
0060 #include <linux/io.h>
0061 #include <linux/module.h>
0062 #include <linux/of_platform.h>
0063 #include <linux/platform_device.h>
0064 #include <linux/regulator/consumer.h>
0065 #include <linux/slab.h>
0066 #include <linux/delay.h>
0067
0068 #include <drm/drm_atomic_helper.h>
0069 #include <drm/drm_bridge.h>
0070 #include <drm/drm_drv.h>
0071 #include <drm/drm_fb_cma_helper.h>
0072 #include <drm/drm_fb_helper.h>
0073 #include <drm/drm_gem.h>
0074 #include <drm/drm_gem_cma_helper.h>
0075 #include <drm/drm_gem_framebuffer_helper.h>
0076 #include <drm/drm_managed.h>
0077 #include <drm/drm_of.h>
0078 #include <drm/drm_probe_helper.h>
0079 #include <drm/drm_panel.h>
0080 #include <drm/drm_vblank.h>
0081
0082 #include "mcde_drm.h"
0083
0084 #define DRIVER_DESC "DRM module for MCDE"
0085
0086 #define MCDE_PID 0x000001FC
0087 #define MCDE_PID_METALFIX_VERSION_SHIFT 0
0088 #define MCDE_PID_METALFIX_VERSION_MASK 0x000000FF
0089 #define MCDE_PID_DEVELOPMENT_VERSION_SHIFT 8
0090 #define MCDE_PID_DEVELOPMENT_VERSION_MASK 0x0000FF00
0091 #define MCDE_PID_MINOR_VERSION_SHIFT 16
0092 #define MCDE_PID_MINOR_VERSION_MASK 0x00FF0000
0093 #define MCDE_PID_MAJOR_VERSION_SHIFT 24
0094 #define MCDE_PID_MAJOR_VERSION_MASK 0xFF000000
0095
0096 static const struct drm_mode_config_funcs mcde_mode_config_funcs = {
0097     .fb_create = drm_gem_fb_create_with_dirty,
0098     .atomic_check = drm_atomic_helper_check,
0099     .atomic_commit = drm_atomic_helper_commit,
0100 };
0101
0102 static const struct drm_mode_config_helper_funcs mcde_mode_config_helpers = {
0103     /*
0104      * Using this function is necessary to commit atomic updates
0105      * that need the CRTC to be enabled before a commit, as is
0106      * the case with e.g. DSI displays.
0107      */
0108     .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
0109 };
0110
0111 static irqreturn_t mcde_irq(int irq, void *data)
0112 {
0113     struct mcde *mcde = data;
0114     u32 val;
0115
0116     val = readl(mcde->regs + MCDE_MISERR);
0117
0118     mcde_display_irq(mcde);
0119
0120     if (val)
0121         dev_info(mcde->dev, "some error IRQ\n");
0122     writel(val, mcde->regs + MCDE_RISERR);
0123
0124     return IRQ_HANDLED;
0125 }
0126
0127 static int mcde_modeset_init(struct drm_device *drm)
0128 {
0129     struct drm_mode_config *mode_config;
0130     struct mcde *mcde = to_mcde(drm);
0131     int ret;
0132
0133     /*
0134      * If no other bridge was found, check if we have a DPI panel or
0135      * any other bridge connected directly to the MCDE DPI output.
0136      * If a DSI bridge is found, DSI will take precedence.
0137      *
0138      * TODO: more elaborate bridge selection if we have more than one
0139      * thing attached to the system.
0140      */
0141     if (!mcde->bridge) {
0142         struct drm_panel *panel;
0143         struct drm_bridge *bridge;
0144
0145         ret = drm_of_find_panel_or_bridge(drm->dev->of_node,
0146                           0, 0, &panel, &bridge);
0147         if (ret) {
0148             dev_err(drm->dev,
0149                 "Could not locate any output bridge or panel\n");
0150             return ret;
0151         }
0152         if (panel) {
0153             bridge = drm_panel_bridge_add_typed(panel,
0154                     DRM_MODE_CONNECTOR_DPI);
0155             if (IS_ERR(bridge)) {
0156                 dev_err(drm->dev,
0157                     "Could not connect panel bridge\n");
0158                 return PTR_ERR(bridge);
0159             }
0160         }
0161         mcde->dpi_output = true;
0162         mcde->bridge = bridge;
0163         mcde->flow_mode = MCDE_DPI_FORMATTER_FLOW;
0164     }
0165
0166     mode_config = &drm->mode_config;
0167     mode_config->funcs = &mcde_mode_config_funcs;
0168     mode_config->helper_private = &mcde_mode_config_helpers;
0169     /* This hardware can do 1080p */
0170     mode_config->min_width = 1;
0171     mode_config->max_width = 1920;
0172     mode_config->min_height = 1;
0173     mode_config->max_height = 1080;
0174
0175     ret = drm_vblank_init(drm, 1);
0176     if (ret) {
0177         dev_err(drm->dev, "failed to init vblank\n");
0178         return ret;
0179     }
0180
0181     ret = mcde_display_init(drm);
0182     if (ret) {
0183         dev_err(drm->dev, "failed to init display\n");
0184         return ret;
0185     }
0186
0187     /* Attach the bridge. */
0188     ret = drm_simple_display_pipe_attach_bridge(&mcde->pipe,
0189                             mcde->bridge);
0190     if (ret) {
0191         dev_err(drm->dev, "failed to attach display output bridge\n");
0192         return ret;
0193     }
0194
0195     drm_mode_config_reset(drm);
0196     drm_kms_helper_poll_init(drm);
0197
0198     return 0;
0199 }
0200
0201 DEFINE_DRM_GEM_CMA_FOPS(drm_fops);
0202
0203 static const struct drm_driver mcde_drm_driver = {
0204     .driver_features =
0205         DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
0206     .lastclose = drm_fb_helper_lastclose,
0207     .ioctls = NULL,
0208     .fops = &drm_fops,
0209     .name = "mcde",
0210     .desc = DRIVER_DESC,
0211     .date = "20180529",
0212     .major = 1,
0213     .minor = 0,
0214     .patchlevel = 0,
0215     DRM_GEM_CMA_DRIVER_OPS,
0216 };
0217
0218 static int mcde_drm_bind(struct device *dev)
0219 {
0220     struct drm_device *drm = dev_get_drvdata(dev);
0221     int ret;
0222
0223     ret = drmm_mode_config_init(drm);
0224     if (ret)
0225         return ret;
0226
0227     ret = component_bind_all(drm->dev, drm);
0228     if (ret) {
0229         dev_err(dev, "can't bind component devices\n");
0230         return ret;
0231     }
0232
0233     ret = mcde_modeset_init(drm);
0234     if (ret)
0235         goto unbind;
0236
0237     ret = drm_dev_register(drm, 0);
0238     if (ret < 0)
0239         goto unbind;
0240
0241     drm_fbdev_generic_setup(drm, 32);
0242
0243     return 0;
0244
0245 unbind:
0246     component_unbind_all(drm->dev, drm);
0247     return ret;
0248 }
0249
0250 static void mcde_drm_unbind(struct device *dev)
0251 {
0252     struct drm_device *drm = dev_get_drvdata(dev);
0253
0254     drm_dev_unregister(drm);
0255     drm_atomic_helper_shutdown(drm);
0256     component_unbind_all(drm->dev, drm);
0257 }
0258
0259 static const struct component_master_ops mcde_drm_comp_ops = {
0260     .bind = mcde_drm_bind,
0261     .unbind = mcde_drm_unbind,
0262 };
0263
0264 static struct platform_driver *const mcde_component_drivers[] = {
0265     &mcde_dsi_driver,
0266 };
0267
0268 static int mcde_probe(struct platform_device *pdev)
0269 {
0270     struct device *dev = &pdev->dev;
0271     struct drm_device *drm;
0272     struct mcde *mcde;
0273     struct component_match *match = NULL;
0274     u32 pid;
0275     int irq;
0276     int ret;
0277     int i;
0278
0279     mcde = devm_drm_dev_alloc(dev, &mcde_drm_driver, struct mcde, drm);
0280     if (IS_ERR(mcde))
0281         return PTR_ERR(mcde);
0282     drm = &mcde->drm;
0283     mcde->dev = dev;
0284     platform_set_drvdata(pdev, drm);
0285
0286     /* First obtain and turn on the main power */
0287     mcde->epod = devm_regulator_get(dev, "epod");
0288     if (IS_ERR(mcde->epod)) {
0289         ret = PTR_ERR(mcde->epod);
0290         dev_err(dev, "can't get EPOD regulator\n");
0291         return ret;
0292     }
0293     ret = regulator_enable(mcde->epod);
0294     if (ret) {
0295         dev_err(dev, "can't enable EPOD regulator\n");
0296         return ret;
0297     }
0298     mcde->vana = devm_regulator_get(dev, "vana");
0299     if (IS_ERR(mcde->vana)) {
0300         ret = PTR_ERR(mcde->vana);
0301         dev_err(dev, "can't get VANA regulator\n");
0302         goto regulator_epod_off;
0303     }
0304     ret = regulator_enable(mcde->vana);
0305     if (ret) {
0306         dev_err(dev, "can't enable VANA regulator\n");
0307         goto regulator_epod_off;
0308     }
0309     /*
0310      * The vendor code uses ESRAM (onchip RAM) and need to activate
0311      * the v-esram34 regulator, but we don't use that yet
0312      */
0313
0314     /* Clock the silicon so we can access the registers */
0315     mcde->mcde_clk = devm_clk_get(dev, "mcde");
0316     if (IS_ERR(mcde->mcde_clk)) {
0317         dev_err(dev, "unable to get MCDE main clock\n");
0318         ret = PTR_ERR(mcde->mcde_clk);
0319         goto regulator_off;
0320     }
0321     ret = clk_prepare_enable(mcde->mcde_clk);
0322     if (ret) {
0323         dev_err(dev, "failed to enable MCDE main clock\n");
0324         goto regulator_off;
0325     }
0326     dev_info(dev, "MCDE clk rate %lu Hz\n", clk_get_rate(mcde->mcde_clk));
0327
0328     mcde->lcd_clk = devm_clk_get(dev, "lcd");
0329     if (IS_ERR(mcde->lcd_clk)) {
0330         dev_err(dev, "unable to get LCD clock\n");
0331         ret = PTR_ERR(mcde->lcd_clk);
0332         goto clk_disable;
0333     }
0334     mcde->hdmi_clk = devm_clk_get(dev, "hdmi");
0335     if (IS_ERR(mcde->hdmi_clk)) {
0336         dev_err(dev, "unable to get HDMI clock\n");
0337         ret = PTR_ERR(mcde->hdmi_clk);
0338         goto clk_disable;
0339     }
0340
0341     mcde->regs = devm_platform_ioremap_resource(pdev, 0);
0342     if (IS_ERR(mcde->regs)) {
0343         dev_err(dev, "no MCDE regs\n");
0344         ret = -EINVAL;
0345         goto clk_disable;
0346     }
0347
0348     irq = platform_get_irq(pdev, 0);
0349     if (irq < 0) {
0350         ret = irq;
0351         goto clk_disable;
0352     }
0353
0354     ret = devm_request_irq(dev, irq, mcde_irq, 0, "mcde", mcde);
0355     if (ret) {
0356         dev_err(dev, "failed to request irq %d\n", ret);
0357         goto clk_disable;
0358     }
0359
0360     /*
0361      * Check hardware revision, we only support U8500v2 version
0362      * as this was the only version used for mass market deployment,
0363      * but surely you can add more versions if you have them and
0364      * need them.
0365      */
0366     pid = readl(mcde->regs + MCDE_PID);
0367     dev_info(dev, "found MCDE HW revision %d.%d (dev %d, metal fix %d)\n",
0368          (pid & MCDE_PID_MAJOR_VERSION_MASK)
0369          >> MCDE_PID_MAJOR_VERSION_SHIFT,
0370          (pid & MCDE_PID_MINOR_VERSION_MASK)
0371          >> MCDE_PID_MINOR_VERSION_SHIFT,
0372          (pid & MCDE_PID_DEVELOPMENT_VERSION_MASK)
0373          >> MCDE_PID_DEVELOPMENT_VERSION_SHIFT,
0374          (pid & MCDE_PID_METALFIX_VERSION_MASK)
0375          >> MCDE_PID_METALFIX_VERSION_SHIFT);
0376     if (pid != 0x03000800) {
0377         dev_err(dev, "unsupported hardware revision\n");
0378         ret = -ENODEV;
0379         goto clk_disable;
0380     }
0381
0382     /* Disable and clear any pending interrupts */
0383     mcde_display_disable_irqs(mcde);
0384     writel(0, mcde->regs + MCDE_IMSCERR);
0385     writel(0xFFFFFFFF, mcde->regs + MCDE_RISERR);
0386
0387     /* Spawn child devices for the DSI ports */
0388     devm_of_platform_populate(dev);
0389
0390     /* Create something that will match the subdrivers when we bind */
0391     for (i = 0; i < ARRAY_SIZE(mcde_component_drivers); i++) {
0392         struct device_driver *drv = &mcde_component_drivers[i]->driver;
0393         struct device *p = NULL, *d;
0394
0395         while ((d = platform_find_device_by_driver(p, drv))) {
0396             put_device(p);
0397             component_match_add(dev, &match, component_compare_dev, d);
0398             p = d;
0399         }
0400         put_device(p);
0401     }
0402     if (!match) {
0403         dev_err(dev, "no matching components\n");
0404         ret = -ENODEV;
0405         goto clk_disable;
0406     }
0407     if (IS_ERR(match)) {
0408         dev_err(dev, "could not create component match\n");
0409         ret = PTR_ERR(match);
0410         goto clk_disable;
0411     }
0412
0413     /*
0414      * Perform an invasive reset of the MCDE and all blocks by
0415      * cutting the power to the subsystem, then bring it back up
0416      * later when we enable the display as a result of
0417      * component_master_add_with_match().
0418      */
0419     ret = regulator_disable(mcde->epod);
0420     if (ret) {
0421         dev_err(dev, "can't disable EPOD regulator\n");
0422         return ret;
0423     }
0424     /* Wait 50 ms so we are sure we cut the power */
0425     usleep_range(50000, 70000);
0426
0427     ret = component_master_add_with_match(&pdev->dev, &mcde_drm_comp_ops,
0428                           match);
0429     if (ret) {
0430         dev_err(dev, "failed to add component master\n");
0431         /*
0432          * The EPOD regulator is already disabled at this point so some
0433          * special errorpath code is needed
0434          */
0435         clk_disable_unprepare(mcde->mcde_clk);
0436         regulator_disable(mcde->vana);
0437         return ret;
0438     }
0439
0440     return 0;
0441
0442 clk_disable:
0443     clk_disable_unprepare(mcde->mcde_clk);
0444 regulator_off:
0445     regulator_disable(mcde->vana);
0446 regulator_epod_off:
0447     regulator_disable(mcde->epod);
0448     return ret;
0449
0450 }
0451
0452 static int mcde_remove(struct platform_device *pdev)
0453 {
0454     struct drm_device *drm = platform_get_drvdata(pdev);
0455     struct mcde *mcde = to_mcde(drm);
0456
0457     component_master_del(&pdev->dev, &mcde_drm_comp_ops);
0458     clk_disable_unprepare(mcde->mcde_clk);
0459     regulator_disable(mcde->vana);
0460     regulator_disable(mcde->epod);
0461
0462     return 0;
0463 }
0464
0465 static const struct of_device_id mcde_of_match[] = {
0466     {
0467         .compatible = "ste,mcde",
0468     },
0469     {},
0470 };
0471
0472 static struct platform_driver mcde_driver = {
0473     .driver = {
0474         .name           = "mcde",
0475         .of_match_table = of_match_ptr(mcde_of_match),
0476     },
0477     .probe = mcde_probe,
0478     .remove = mcde_remove,
0479 };
0480
0481 static struct platform_driver *const component_drivers[] = {
0482     &mcde_dsi_driver,
0483 };
0484
0485 static int __init mcde_drm_register(void)
0486 {
0487     int ret;
0488
0489     if (drm_firmware_drivers_only())
0490         return -ENODEV;
0491
0492     ret = platform_register_drivers(component_drivers,
0493                     ARRAY_SIZE(component_drivers));
0494     if (ret)
0495         return ret;
0496
0497     return platform_driver_register(&mcde_driver);
0498 }
0499
0500 static void __exit mcde_drm_unregister(void)
0501 {
0502     platform_unregister_drivers(component_drivers,
0503                     ARRAY_SIZE(component_drivers));
0504     platform_driver_unregister(&mcde_driver);
0505 }
0506
0507 module_init(mcde_drm_register);
0508 module_exit(mcde_drm_unregister);
0509
0510 MODULE_ALIAS("platform:mcde-drm");
0511 MODULE_DESCRIPTION(DRIVER_DESC);
0512 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
0513 MODULE_LICENSE("GPL");