drm/logicvc/logicvc_regs.h

0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * Copyright (C) 2019-2022 Bootlin
0004  * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
0005  *
0006  * Copyright (C) 2014 Xylon d.o.o.
0007  * Author: Davor Joja <davor.joja@logicbricks.com>
0008  */
0009
0010 #ifndef _LOGICVC_REGS_H_
0011 #define _LOGICVC_REGS_H_
0012
0013 #define LOGICVC_DIMENSIONS_MAX      (BIT(16) - 1)
0014
0015 #define LOGICVC_HSYNC_FRONT_PORCH_REG   0x00
0016 #define LOGICVC_HSYNC_REG       0x08
0017 #define LOGICVC_HSYNC_BACK_PORCH_REG    0x10
0018 #define LOGICVC_HRES_REG        0x18
0019 #define LOGICVC_VSYNC_FRONT_PORCH_REG   0x20
0020 #define LOGICVC_VSYNC_REG       0x28
0021 #define LOGICVC_VSYNC_BACK_PORCH_REG    0x30
0022 #define LOGICVC_VRES_REG        0x38
0023
0024 #define LOGICVC_CTRL_REG        0x40
0025 #define LOGICVC_CTRL_CLOCK_INVERT   BIT(8)
0026 #define LOGICVC_CTRL_PIXEL_INVERT   BIT(7)
0027 #define LOGICVC_CTRL_DE_INVERT      BIT(5)
0028 #define LOGICVC_CTRL_DE_ENABLE      BIT(4)
0029 #define LOGICVC_CTRL_VSYNC_INVERT   BIT(3)
0030 #define LOGICVC_CTRL_VSYNC_ENABLE   BIT(2)
0031 #define LOGICVC_CTRL_HSYNC_INVERT   BIT(1)
0032 #define LOGICVC_CTRL_HSYNC_ENABLE   BIT(0)
0033
0034 #define LOGICVC_DTYPE_REG       0x48
0035 #define LOGICVC_BACKGROUND_COLOR_REG    0x50
0036
0037 #define LOGICVC_BUFFER_SEL_REG      0x58
0038 #define LOGICVC_BUFFER_SEL_VALUE(i, v) \
0039     (BIT(10 + (i)) | ((v) << (2 * (i))))
0040 #define LOGICVC_BUFFER_SEL_MAX      2
0041
0042 #define LOGICVC_DOUBLE_CLUT_REG     0x60
0043
0044 #define LOGICVC_INT_STAT_REG        0x68
0045 #define LOGICVC_INT_STAT_V_SYNC     BIT(5)
0046
0047 #define LOGICVC_INT_MASK_REG        0x70
0048 #define LOGICVC_INT_MASK_V_SYNC     BIT(5)
0049
0050 #define LOGICVC_POWER_CTRL_REG      0x78
0051 #define LOGICVC_POWER_CTRL_BACKLIGHT_ENABLE BIT(0)
0052 #define LOGICVC_POWER_CTRL_VDD_ENABLE       BIT(1)
0053 #define LOGICVC_POWER_CTRL_VEE_ENABLE       BIT(2)
0054 #define LOGICVC_POWER_CTRL_VIDEO_ENABLE     BIT(3)
0055
0056 #define LOGICVC_IP_VERSION_REG      0xf8
0057 #define LOGICVC_IP_VERSION_MAJOR_MASK   GENMASK(16, 11)
0058 #define LOGICVC_IP_VERSION_MINOR_MASK   GENMASK(10, 5)
0059 #define LOGICVC_IP_VERSION_LEVEL_MASK   GENMASK(4, 0)
0060
0061 #define LOGICVC_LAYER_ADDRESS_REG(i)    (0x100 + (i) * 0x80)
0062 #define LOGICVC_LAYER_HOFFSET_REG(i)    (0x100 + (i) * 0x80)
0063
0064 #define LOGICVC_LAYER_VOFFSET_REG(i)    (0x108 + (i) * 0x80)
0065 #define LOGICVC_LAYER_VOFFSET_MAX   4095
0066
0067 #define LOGICVC_LAYER_HPOSITION_REG(i)  (0x110 + (i) * 0x80)
0068 #define LOGICVC_LAYER_VPOSITION_REG(i)  (0x118 + (i) * 0x80)
0069 #define LOGICVC_LAYER_WIDTH_REG(i)  (0x120 + (i) * 0x80)
0070 #define LOGICVC_LAYER_HEIGHT_REG(i) (0x128 + (i) * 0x80)
0071 #define LOGICVC_LAYER_ALPHA_REG(i)  (0x130 + (i) * 0x80)
0072
0073 #define LOGICVC_LAYER_CTRL_REG(i)   (0x138 + (i) * 0x80)
0074 #define LOGICVC_LAYER_CTRL_ENABLE   BIT(0)
0075 #define LOGICVC_LAYER_CTRL_COLOR_KEY_DISABLE    BIT(1)
0076 #define LOGICVC_LAYER_CTRL_PIXEL_FORMAT_INVERT  BIT(4)
0077
0078 #define LOGICVC_LAYER_COLOR_KEY_REG(i)  (0x140 + (i) * 0x80)
0079
0080 #endif