drm/lima/lima_sched.h

0001 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
0002 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
0003
0004 #ifndef __LIMA_SCHED_H__
0005 #define __LIMA_SCHED_H__
0006
0007 #include <drm/gpu_scheduler.h>
0008 #include <linux/list.h>
0009 #include <linux/xarray.h>
0010
0011 struct lima_device;
0012 struct lima_vm;
0013
0014 struct lima_sched_error_task {
0015     struct list_head list;
0016     void *data;
0017     u32 size;
0018 };
0019
0020 struct lima_sched_task {
0021     struct drm_sched_job base;
0022
0023     struct lima_vm *vm;
0024     void *frame;
0025
0026     struct lima_bo **bos;
0027     int num_bos;
0028
0029     bool recoverable;
0030     struct lima_bo *heap;
0031
0032     /* pipe fence */
0033     struct dma_fence *fence;
0034 };
0035
0036 struct lima_sched_context {
0037     struct drm_sched_entity base;
0038 };
0039
0040 #define LIMA_SCHED_PIPE_MAX_MMU       8
0041 #define LIMA_SCHED_PIPE_MAX_L2_CACHE  2
0042 #define LIMA_SCHED_PIPE_MAX_PROCESSOR 8
0043
0044 struct lima_ip;
0045
0046 struct lima_sched_pipe {
0047     struct drm_gpu_scheduler base;
0048
0049     u64 fence_context;
0050     u32 fence_seqno;
0051     spinlock_t fence_lock;
0052
0053     struct lima_device *ldev;
0054
0055     struct lima_sched_task *current_task;
0056     struct lima_vm *current_vm;
0057
0058     struct lima_ip *mmu[LIMA_SCHED_PIPE_MAX_MMU];
0059     int num_mmu;
0060
0061     struct lima_ip *l2_cache[LIMA_SCHED_PIPE_MAX_L2_CACHE];
0062     int num_l2_cache;
0063
0064     struct lima_ip *processor[LIMA_SCHED_PIPE_MAX_PROCESSOR];
0065     int num_processor;
0066
0067     struct lima_ip *bcast_processor;
0068     struct lima_ip *bcast_mmu;
0069
0070     u32 done;
0071     bool error;
0072     atomic_t task;
0073
0074     int frame_size;
0075     struct kmem_cache *task_slab;
0076
0077     int (*task_validate)(struct lima_sched_pipe *pipe, struct lima_sched_task *task);
0078     void (*task_run)(struct lima_sched_pipe *pipe, struct lima_sched_task *task);
0079     void (*task_fini)(struct lima_sched_pipe *pipe);
0080     void (*task_error)(struct lima_sched_pipe *pipe);
0081     void (*task_mmu_error)(struct lima_sched_pipe *pipe);
0082     int (*task_recover)(struct lima_sched_pipe *pipe);
0083
0084     struct work_struct recover_work;
0085 };
0086
0087 int lima_sched_task_init(struct lima_sched_task *task,
0088              struct lima_sched_context *context,
0089              struct lima_bo **bos, int num_bos,
0090              struct lima_vm *vm);
0091 void lima_sched_task_fini(struct lima_sched_task *task);
0092
0093 int lima_sched_context_init(struct lima_sched_pipe *pipe,
0094                 struct lima_sched_context *context,
0095                 atomic_t *guilty);
0096 void lima_sched_context_fini(struct lima_sched_pipe *pipe,
0097                  struct lima_sched_context *context);
0098 struct dma_fence *lima_sched_context_queue_task(struct lima_sched_task *task);
0099
0100 int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name);
0101 void lima_sched_pipe_fini(struct lima_sched_pipe *pipe);
0102 void lima_sched_pipe_task_done(struct lima_sched_pipe *pipe);
0103
0104 static inline void lima_sched_pipe_mmu_error(struct lima_sched_pipe *pipe)
0105 {
0106     pipe->error = true;
0107     pipe->task_mmu_error(pipe);
0108 }
0109
0110 int lima_sched_slab_init(void);
0111 void lima_sched_slab_fini(void);
0112
0113 #endif