0001
0002
0003
0004 #include <linux/regulator/consumer.h>
0005 #include <linux/reset.h>
0006 #include <linux/clk.h>
0007 #include <linux/slab.h>
0008 #include <linux/dma-mapping.h>
0009 #include <linux/platform_device.h>
0010
0011 #include "lima_device.h"
0012 #include "lima_gp.h"
0013 #include "lima_pp.h"
0014 #include "lima_mmu.h"
0015 #include "lima_pmu.h"
0016 #include "lima_l2_cache.h"
0017 #include "lima_dlbu.h"
0018 #include "lima_bcast.h"
0019 #include "lima_vm.h"
0020
0021 struct lima_ip_desc {
0022 char *name;
0023 char *irq_name;
0024 bool must_have[lima_gpu_num];
0025 int offset[lima_gpu_num];
0026
0027 int (*init)(struct lima_ip *ip);
0028 void (*fini)(struct lima_ip *ip);
0029 int (*resume)(struct lima_ip *ip);
0030 void (*suspend)(struct lima_ip *ip);
0031 };
0032
0033 #define LIMA_IP_DESC(ipname, mst0, mst1, off0, off1, func, irq) \
0034 [lima_ip_##ipname] = { \
0035 .name = #ipname, \
0036 .irq_name = irq, \
0037 .must_have = { \
0038 [lima_gpu_mali400] = mst0, \
0039 [lima_gpu_mali450] = mst1, \
0040 }, \
0041 .offset = { \
0042 [lima_gpu_mali400] = off0, \
0043 [lima_gpu_mali450] = off1, \
0044 }, \
0045 .init = lima_##func##_init, \
0046 .fini = lima_##func##_fini, \
0047 .resume = lima_##func##_resume, \
0048 .suspend = lima_##func##_suspend, \
0049 }
0050
0051 static struct lima_ip_desc lima_ip_desc[lima_ip_num] = {
0052 LIMA_IP_DESC(pmu, false, false, 0x02000, 0x02000, pmu, "pmu"),
0053 LIMA_IP_DESC(l2_cache0, true, true, 0x01000, 0x10000, l2_cache, NULL),
0054 LIMA_IP_DESC(l2_cache1, false, true, -1, 0x01000, l2_cache, NULL),
0055 LIMA_IP_DESC(l2_cache2, false, false, -1, 0x11000, l2_cache, NULL),
0056 LIMA_IP_DESC(gp, true, true, 0x00000, 0x00000, gp, "gp"),
0057 LIMA_IP_DESC(pp0, true, true, 0x08000, 0x08000, pp, "pp0"),
0058 LIMA_IP_DESC(pp1, false, false, 0x0A000, 0x0A000, pp, "pp1"),
0059 LIMA_IP_DESC(pp2, false, false, 0x0C000, 0x0C000, pp, "pp2"),
0060 LIMA_IP_DESC(pp3, false, false, 0x0E000, 0x0E000, pp, "pp3"),
0061 LIMA_IP_DESC(pp4, false, false, -1, 0x28000, pp, "pp4"),
0062 LIMA_IP_DESC(pp5, false, false, -1, 0x2A000, pp, "pp5"),
0063 LIMA_IP_DESC(pp6, false, false, -1, 0x2C000, pp, "pp6"),
0064 LIMA_IP_DESC(pp7, false, false, -1, 0x2E000, pp, "pp7"),
0065 LIMA_IP_DESC(gpmmu, true, true, 0x03000, 0x03000, mmu, "gpmmu"),
0066 LIMA_IP_DESC(ppmmu0, true, true, 0x04000, 0x04000, mmu, "ppmmu0"),
0067 LIMA_IP_DESC(ppmmu1, false, false, 0x05000, 0x05000, mmu, "ppmmu1"),
0068 LIMA_IP_DESC(ppmmu2, false, false, 0x06000, 0x06000, mmu, "ppmmu2"),
0069 LIMA_IP_DESC(ppmmu3, false, false, 0x07000, 0x07000, mmu, "ppmmu3"),
0070 LIMA_IP_DESC(ppmmu4, false, false, -1, 0x1C000, mmu, "ppmmu4"),
0071 LIMA_IP_DESC(ppmmu5, false, false, -1, 0x1D000, mmu, "ppmmu5"),
0072 LIMA_IP_DESC(ppmmu6, false, false, -1, 0x1E000, mmu, "ppmmu6"),
0073 LIMA_IP_DESC(ppmmu7, false, false, -1, 0x1F000, mmu, "ppmmu7"),
0074 LIMA_IP_DESC(dlbu, false, true, -1, 0x14000, dlbu, NULL),
0075 LIMA_IP_DESC(bcast, false, true, -1, 0x13000, bcast, NULL),
0076 LIMA_IP_DESC(pp_bcast, false, true, -1, 0x16000, pp_bcast, "pp"),
0077 LIMA_IP_DESC(ppmmu_bcast, false, true, -1, 0x15000, mmu, NULL),
0078 };
0079
0080 const char *lima_ip_name(struct lima_ip *ip)
0081 {
0082 return lima_ip_desc[ip->id].name;
0083 }
0084
0085 static int lima_clk_enable(struct lima_device *dev)
0086 {
0087 int err;
0088
0089 err = clk_prepare_enable(dev->clk_bus);
0090 if (err)
0091 return err;
0092
0093 err = clk_prepare_enable(dev->clk_gpu);
0094 if (err)
0095 goto error_out0;
0096
0097 if (dev->reset) {
0098 err = reset_control_deassert(dev->reset);
0099 if (err) {
0100 dev_err(dev->dev,
0101 "reset controller deassert failed %d\n", err);
0102 goto error_out1;
0103 }
0104 }
0105
0106 return 0;
0107
0108 error_out1:
0109 clk_disable_unprepare(dev->clk_gpu);
0110 error_out0:
0111 clk_disable_unprepare(dev->clk_bus);
0112 return err;
0113 }
0114
0115 static void lima_clk_disable(struct lima_device *dev)
0116 {
0117 if (dev->reset)
0118 reset_control_assert(dev->reset);
0119 clk_disable_unprepare(dev->clk_gpu);
0120 clk_disable_unprepare(dev->clk_bus);
0121 }
0122
0123 static int lima_clk_init(struct lima_device *dev)
0124 {
0125 int err;
0126
0127 dev->clk_bus = devm_clk_get(dev->dev, "bus");
0128 if (IS_ERR(dev->clk_bus)) {
0129 err = PTR_ERR(dev->clk_bus);
0130 if (err != -EPROBE_DEFER)
0131 dev_err(dev->dev, "get bus clk failed %d\n", err);
0132 dev->clk_bus = NULL;
0133 return err;
0134 }
0135
0136 dev->clk_gpu = devm_clk_get(dev->dev, "core");
0137 if (IS_ERR(dev->clk_gpu)) {
0138 err = PTR_ERR(dev->clk_gpu);
0139 if (err != -EPROBE_DEFER)
0140 dev_err(dev->dev, "get core clk failed %d\n", err);
0141 dev->clk_gpu = NULL;
0142 return err;
0143 }
0144
0145 dev->reset = devm_reset_control_array_get_optional_shared(dev->dev);
0146 if (IS_ERR(dev->reset)) {
0147 err = PTR_ERR(dev->reset);
0148 if (err != -EPROBE_DEFER)
0149 dev_err(dev->dev, "get reset controller failed %d\n",
0150 err);
0151 dev->reset = NULL;
0152 return err;
0153 }
0154
0155 return lima_clk_enable(dev);
0156 }
0157
0158 static void lima_clk_fini(struct lima_device *dev)
0159 {
0160 lima_clk_disable(dev);
0161 }
0162
0163 static int lima_regulator_enable(struct lima_device *dev)
0164 {
0165 int ret;
0166
0167 if (!dev->regulator)
0168 return 0;
0169
0170 ret = regulator_enable(dev->regulator);
0171 if (ret < 0) {
0172 dev_err(dev->dev, "failed to enable regulator: %d\n", ret);
0173 return ret;
0174 }
0175
0176 return 0;
0177 }
0178
0179 static void lima_regulator_disable(struct lima_device *dev)
0180 {
0181 if (dev->regulator)
0182 regulator_disable(dev->regulator);
0183 }
0184
0185 static int lima_regulator_init(struct lima_device *dev)
0186 {
0187 int ret;
0188
0189 dev->regulator = devm_regulator_get_optional(dev->dev, "mali");
0190 if (IS_ERR(dev->regulator)) {
0191 ret = PTR_ERR(dev->regulator);
0192 dev->regulator = NULL;
0193 if (ret == -ENODEV)
0194 return 0;
0195 if (ret != -EPROBE_DEFER)
0196 dev_err(dev->dev, "failed to get regulator: %d\n", ret);
0197 return ret;
0198 }
0199
0200 return lima_regulator_enable(dev);
0201 }
0202
0203 static void lima_regulator_fini(struct lima_device *dev)
0204 {
0205 lima_regulator_disable(dev);
0206 }
0207
0208 static int lima_init_ip(struct lima_device *dev, int index)
0209 {
0210 struct platform_device *pdev = to_platform_device(dev->dev);
0211 struct lima_ip_desc *desc = lima_ip_desc + index;
0212 struct lima_ip *ip = dev->ip + index;
0213 const char *irq_name = desc->irq_name;
0214 int offset = desc->offset[dev->id];
0215 bool must = desc->must_have[dev->id];
0216 int err;
0217
0218 if (offset < 0)
0219 return 0;
0220
0221 ip->dev = dev;
0222 ip->id = index;
0223 ip->iomem = dev->iomem + offset;
0224 if (irq_name) {
0225 err = must ? platform_get_irq_byname(pdev, irq_name) :
0226 platform_get_irq_byname_optional(pdev, irq_name);
0227 if (err < 0)
0228 goto out;
0229 ip->irq = err;
0230 }
0231
0232 err = desc->init(ip);
0233 if (!err) {
0234 ip->present = true;
0235 return 0;
0236 }
0237
0238 out:
0239 return must ? err : 0;
0240 }
0241
0242 static void lima_fini_ip(struct lima_device *ldev, int index)
0243 {
0244 struct lima_ip_desc *desc = lima_ip_desc + index;
0245 struct lima_ip *ip = ldev->ip + index;
0246
0247 if (ip->present)
0248 desc->fini(ip);
0249 }
0250
0251 static int lima_resume_ip(struct lima_device *ldev, int index)
0252 {
0253 struct lima_ip_desc *desc = lima_ip_desc + index;
0254 struct lima_ip *ip = ldev->ip + index;
0255 int ret = 0;
0256
0257 if (ip->present)
0258 ret = desc->resume(ip);
0259
0260 return ret;
0261 }
0262
0263 static void lima_suspend_ip(struct lima_device *ldev, int index)
0264 {
0265 struct lima_ip_desc *desc = lima_ip_desc + index;
0266 struct lima_ip *ip = ldev->ip + index;
0267
0268 if (ip->present)
0269 desc->suspend(ip);
0270 }
0271
0272 static int lima_init_gp_pipe(struct lima_device *dev)
0273 {
0274 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;
0275 int err;
0276
0277 pipe->ldev = dev;
0278
0279 err = lima_sched_pipe_init(pipe, "gp");
0280 if (err)
0281 return err;
0282
0283 pipe->l2_cache[pipe->num_l2_cache++] = dev->ip + lima_ip_l2_cache0;
0284 pipe->mmu[pipe->num_mmu++] = dev->ip + lima_ip_gpmmu;
0285 pipe->processor[pipe->num_processor++] = dev->ip + lima_ip_gp;
0286
0287 err = lima_gp_pipe_init(dev);
0288 if (err) {
0289 lima_sched_pipe_fini(pipe);
0290 return err;
0291 }
0292
0293 return 0;
0294 }
0295
0296 static void lima_fini_gp_pipe(struct lima_device *dev)
0297 {
0298 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp;
0299
0300 lima_gp_pipe_fini(dev);
0301 lima_sched_pipe_fini(pipe);
0302 }
0303
0304 static int lima_init_pp_pipe(struct lima_device *dev)
0305 {
0306 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;
0307 int err, i;
0308
0309 pipe->ldev = dev;
0310
0311 err = lima_sched_pipe_init(pipe, "pp");
0312 if (err)
0313 return err;
0314
0315 for (i = 0; i < LIMA_SCHED_PIPE_MAX_PROCESSOR; i++) {
0316 struct lima_ip *pp = dev->ip + lima_ip_pp0 + i;
0317 struct lima_ip *ppmmu = dev->ip + lima_ip_ppmmu0 + i;
0318 struct lima_ip *l2_cache;
0319
0320 if (dev->id == lima_gpu_mali400)
0321 l2_cache = dev->ip + lima_ip_l2_cache0;
0322 else
0323 l2_cache = dev->ip + lima_ip_l2_cache1 + (i >> 2);
0324
0325 if (pp->present && ppmmu->present && l2_cache->present) {
0326 pipe->mmu[pipe->num_mmu++] = ppmmu;
0327 pipe->processor[pipe->num_processor++] = pp;
0328 if (!pipe->l2_cache[i >> 2])
0329 pipe->l2_cache[pipe->num_l2_cache++] = l2_cache;
0330 }
0331 }
0332
0333 if (dev->ip[lima_ip_bcast].present) {
0334 pipe->bcast_processor = dev->ip + lima_ip_pp_bcast;
0335 pipe->bcast_mmu = dev->ip + lima_ip_ppmmu_bcast;
0336 }
0337
0338 err = lima_pp_pipe_init(dev);
0339 if (err) {
0340 lima_sched_pipe_fini(pipe);
0341 return err;
0342 }
0343
0344 return 0;
0345 }
0346
0347 static void lima_fini_pp_pipe(struct lima_device *dev)
0348 {
0349 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;
0350
0351 lima_pp_pipe_fini(dev);
0352 lima_sched_pipe_fini(pipe);
0353 }
0354
0355 int lima_device_init(struct lima_device *ldev)
0356 {
0357 struct platform_device *pdev = to_platform_device(ldev->dev);
0358 int err, i;
0359
0360 dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
0361 dma_set_max_seg_size(ldev->dev, UINT_MAX);
0362
0363 err = lima_clk_init(ldev);
0364 if (err)
0365 return err;
0366
0367 err = lima_regulator_init(ldev);
0368 if (err)
0369 goto err_out0;
0370
0371 ldev->empty_vm = lima_vm_create(ldev);
0372 if (!ldev->empty_vm) {
0373 err = -ENOMEM;
0374 goto err_out1;
0375 }
0376
0377 ldev->va_start = 0;
0378 if (ldev->id == lima_gpu_mali450) {
0379 ldev->va_end = LIMA_VA_RESERVE_START;
0380 ldev->dlbu_cpu = dma_alloc_wc(
0381 ldev->dev, LIMA_PAGE_SIZE,
0382 &ldev->dlbu_dma, GFP_KERNEL | __GFP_NOWARN);
0383 if (!ldev->dlbu_cpu) {
0384 err = -ENOMEM;
0385 goto err_out2;
0386 }
0387 } else
0388 ldev->va_end = LIMA_VA_RESERVE_END;
0389
0390 ldev->iomem = devm_platform_ioremap_resource(pdev, 0);
0391 if (IS_ERR(ldev->iomem)) {
0392 dev_err(ldev->dev, "fail to ioremap iomem\n");
0393 err = PTR_ERR(ldev->iomem);
0394 goto err_out3;
0395 }
0396
0397 for (i = 0; i < lima_ip_num; i++) {
0398 err = lima_init_ip(ldev, i);
0399 if (err)
0400 goto err_out4;
0401 }
0402
0403 err = lima_init_gp_pipe(ldev);
0404 if (err)
0405 goto err_out4;
0406
0407 err = lima_init_pp_pipe(ldev);
0408 if (err)
0409 goto err_out5;
0410
0411 ldev->dump.magic = LIMA_DUMP_MAGIC;
0412 ldev->dump.version_major = LIMA_DUMP_MAJOR;
0413 ldev->dump.version_minor = LIMA_DUMP_MINOR;
0414 INIT_LIST_HEAD(&ldev->error_task_list);
0415 mutex_init(&ldev->error_task_list_lock);
0416
0417 dev_info(ldev->dev, "bus rate = %lu\n", clk_get_rate(ldev->clk_bus));
0418 dev_info(ldev->dev, "mod rate = %lu", clk_get_rate(ldev->clk_gpu));
0419
0420 return 0;
0421
0422 err_out5:
0423 lima_fini_gp_pipe(ldev);
0424 err_out4:
0425 while (--i >= 0)
0426 lima_fini_ip(ldev, i);
0427 err_out3:
0428 if (ldev->dlbu_cpu)
0429 dma_free_wc(ldev->dev, LIMA_PAGE_SIZE,
0430 ldev->dlbu_cpu, ldev->dlbu_dma);
0431 err_out2:
0432 lima_vm_put(ldev->empty_vm);
0433 err_out1:
0434 lima_regulator_fini(ldev);
0435 err_out0:
0436 lima_clk_fini(ldev);
0437 return err;
0438 }
0439
0440 void lima_device_fini(struct lima_device *ldev)
0441 {
0442 int i;
0443 struct lima_sched_error_task *et, *tmp;
0444
0445 list_for_each_entry_safe(et, tmp, &ldev->error_task_list, list) {
0446 list_del(&et->list);
0447 kvfree(et);
0448 }
0449 mutex_destroy(&ldev->error_task_list_lock);
0450
0451 lima_fini_pp_pipe(ldev);
0452 lima_fini_gp_pipe(ldev);
0453
0454 for (i = lima_ip_num - 1; i >= 0; i--)
0455 lima_fini_ip(ldev, i);
0456
0457 if (ldev->dlbu_cpu)
0458 dma_free_wc(ldev->dev, LIMA_PAGE_SIZE,
0459 ldev->dlbu_cpu, ldev->dlbu_dma);
0460
0461 lima_vm_put(ldev->empty_vm);
0462
0463 lima_regulator_fini(ldev);
0464
0465 lima_clk_fini(ldev);
0466 }
0467
0468 int lima_device_resume(struct device *dev)
0469 {
0470 struct lima_device *ldev = dev_get_drvdata(dev);
0471 int i, err;
0472
0473 err = lima_clk_enable(ldev);
0474 if (err) {
0475 dev_err(dev, "resume clk fail %d\n", err);
0476 return err;
0477 }
0478
0479 err = lima_regulator_enable(ldev);
0480 if (err) {
0481 dev_err(dev, "resume regulator fail %d\n", err);
0482 goto err_out0;
0483 }
0484
0485 for (i = 0; i < lima_ip_num; i++) {
0486 err = lima_resume_ip(ldev, i);
0487 if (err) {
0488 dev_err(dev, "resume ip %d fail\n", i);
0489 goto err_out1;
0490 }
0491 }
0492
0493 err = lima_devfreq_resume(&ldev->devfreq);
0494 if (err) {
0495 dev_err(dev, "devfreq resume fail\n");
0496 goto err_out1;
0497 }
0498
0499 return 0;
0500
0501 err_out1:
0502 while (--i >= 0)
0503 lima_suspend_ip(ldev, i);
0504 lima_regulator_disable(ldev);
0505 err_out0:
0506 lima_clk_disable(ldev);
0507 return err;
0508 }
0509
0510 int lima_device_suspend(struct device *dev)
0511 {
0512 struct lima_device *ldev = dev_get_drvdata(dev);
0513 int i, err;
0514
0515
0516 for (i = 0; i < lima_pipe_num; i++) {
0517 if (atomic_read(&ldev->pipe[i].base.hw_rq_count))
0518 return -EBUSY;
0519 }
0520
0521 err = lima_devfreq_suspend(&ldev->devfreq);
0522 if (err) {
0523 dev_err(dev, "devfreq suspend fail\n");
0524 return err;
0525 }
0526
0527 for (i = lima_ip_num - 1; i >= 0; i--)
0528 lima_suspend_ip(ldev, i);
0529
0530 lima_regulator_disable(ldev);
0531
0532 lima_clk_disable(ldev);
0533
0534 return 0;
0535 }