drm/imx/ipuv3-plane.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __IPUV3_PLANE_H__
0003 #define __IPUV3_PLANE_H__
0004
0005 #include <drm/drm_crtc.h> /* drm_plane */
0006
0007 struct drm_plane;
0008 struct drm_device;
0009 struct ipu_soc;
0010 struct drm_crtc;
0011 struct drm_framebuffer;
0012
0013 struct ipuv3_channel;
0014 struct dmfc_channel;
0015 struct ipu_dp;
0016
0017 struct ipu_plane {
0018     struct drm_plane    base;
0019
0020     struct ipu_soc      *ipu;
0021     struct ipuv3_channel    *ipu_ch;
0022     struct ipuv3_channel    *alpha_ch;
0023     struct dmfc_channel *dmfc;
0024     struct ipu_dp       *dp;
0025
0026     int         dma;
0027     int         dp_flow;
0028
0029     bool            disabling;
0030 };
0031
0032 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
0033                  int dma, int dp, unsigned int possible_crtcs,
0034                  enum drm_plane_type type);
0035
0036 /* Init IDMAC, DMFC, DP */
0037 int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc,
0038                struct drm_display_mode *mode,
0039                struct drm_framebuffer *fb, int crtc_x, int crtc_y,
0040                unsigned int crtc_w, unsigned int crtc_h,
0041                uint32_t src_x, uint32_t src_y, uint32_t src_w,
0042                uint32_t src_h, bool interlaced);
0043
0044 int ipu_plane_irq(struct ipu_plane *plane);
0045
0046 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
0047 void ipu_plane_disable_deferred(struct drm_plane *plane);
0048 bool ipu_plane_atomic_update_pending(struct drm_plane *plane);
0049
0050 #endif