imx/dcss/dcss-crtc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright 2019 NXP.
0004  */
0005
0006 #include <drm/drm_atomic.h>
0007 #include <drm/drm_atomic_helper.h>
0008 #include <drm/drm_vblank.h>
0009 #include <linux/platform_device.h>
0010 #include <linux/pm_runtime.h>
0011
0012 #include "dcss-dev.h"
0013 #include "dcss-kms.h"
0014
0015 static int dcss_enable_vblank(struct drm_crtc *crtc)
0016 {
0017     struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
0018                            base);
0019     struct dcss_dev *dcss = crtc->dev->dev_private;
0020
0021     dcss_dtg_vblank_irq_enable(dcss->dtg, true);
0022
0023     dcss_dtg_ctxld_kick_irq_enable(dcss->dtg, true);
0024
0025     enable_irq(dcss_crtc->irq);
0026
0027     return 0;
0028 }
0029
0030 static void dcss_disable_vblank(struct drm_crtc *crtc)
0031 {
0032     struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
0033                            base);
0034     struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
0035
0036     disable_irq_nosync(dcss_crtc->irq);
0037
0038     dcss_dtg_vblank_irq_enable(dcss->dtg, false);
0039
0040     if (dcss_crtc->disable_ctxld_kick_irq)
0041         dcss_dtg_ctxld_kick_irq_enable(dcss->dtg, false);
0042 }
0043
0044 static const struct drm_crtc_funcs dcss_crtc_funcs = {
0045     .set_config = drm_atomic_helper_set_config,
0046     .destroy = drm_crtc_cleanup,
0047     .page_flip = drm_atomic_helper_page_flip,
0048     .reset = drm_atomic_helper_crtc_reset,
0049     .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
0050     .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
0051     .enable_vblank = dcss_enable_vblank,
0052     .disable_vblank = dcss_disable_vblank,
0053 };
0054
0055 static void dcss_crtc_atomic_begin(struct drm_crtc *crtc,
0056                    struct drm_atomic_state *state)
0057 {
0058     drm_crtc_vblank_on(crtc);
0059 }
0060
0061 static void dcss_crtc_atomic_flush(struct drm_crtc *crtc,
0062                    struct drm_atomic_state *state)
0063 {
0064     struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
0065                            base);
0066     struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
0067
0068     spin_lock_irq(&crtc->dev->event_lock);
0069     if (crtc->state->event) {
0070         WARN_ON(drm_crtc_vblank_get(crtc));
0071         drm_crtc_arm_vblank_event(crtc, crtc->state->event);
0072         crtc->state->event = NULL;
0073     }
0074     spin_unlock_irq(&crtc->dev->event_lock);
0075
0076     if (dcss_dtg_is_enabled(dcss->dtg))
0077         dcss_ctxld_enable(dcss->ctxld);
0078 }
0079
0080 static void dcss_crtc_atomic_enable(struct drm_crtc *crtc,
0081                     struct drm_atomic_state *state)
0082 {
0083     struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
0084                                           crtc);
0085     struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
0086                            base);
0087     struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
0088     struct drm_display_mode *mode = &crtc->state->adjusted_mode;
0089     struct drm_display_mode *old_mode = &old_crtc_state->adjusted_mode;
0090     struct videomode vm;
0091
0092     drm_display_mode_to_videomode(mode, &vm);
0093
0094     pm_runtime_get_sync(dcss->dev);
0095
0096     vm.pixelclock = mode->crtc_clock * 1000;
0097
0098     dcss_ss_subsam_set(dcss->ss);
0099     dcss_dtg_css_set(dcss->dtg);
0100
0101     if (!drm_mode_equal(mode, old_mode) || !old_crtc_state->active) {
0102         dcss_dtg_sync_set(dcss->dtg, &vm);
0103         dcss_ss_sync_set(dcss->ss, &vm,
0104                  mode->flags & DRM_MODE_FLAG_PHSYNC,
0105                  mode->flags & DRM_MODE_FLAG_PVSYNC);
0106     }
0107
0108     dcss_enable_dtg_and_ss(dcss);
0109
0110     dcss_ctxld_enable(dcss->ctxld);
0111
0112     /* Allow CTXLD kick interrupt to be disabled when VBLANK is disabled. */
0113     dcss_crtc->disable_ctxld_kick_irq = true;
0114 }
0115
0116 static void dcss_crtc_atomic_disable(struct drm_crtc *crtc,
0117                      struct drm_atomic_state *state)
0118 {
0119     struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state,
0120                                           crtc);
0121     struct dcss_crtc *dcss_crtc = container_of(crtc, struct dcss_crtc,
0122                            base);
0123     struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
0124     struct drm_display_mode *mode = &crtc->state->adjusted_mode;
0125     struct drm_display_mode *old_mode = &old_crtc_state->adjusted_mode;
0126
0127     drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
0128
0129     spin_lock_irq(&crtc->dev->event_lock);
0130     if (crtc->state->event) {
0131         drm_crtc_send_vblank_event(crtc, crtc->state->event);
0132         crtc->state->event = NULL;
0133     }
0134     spin_unlock_irq(&crtc->dev->event_lock);
0135
0136     dcss_dtg_ctxld_kick_irq_enable(dcss->dtg, true);
0137
0138     reinit_completion(&dcss->disable_completion);
0139
0140     dcss_disable_dtg_and_ss(dcss);
0141
0142     dcss_ctxld_enable(dcss->ctxld);
0143
0144     if (!drm_mode_equal(mode, old_mode) || !crtc->state->active)
0145         if (!wait_for_completion_timeout(&dcss->disable_completion,
0146                          msecs_to_jiffies(100)))
0147             dev_err(dcss->dev, "Shutting off DTG timed out.\n");
0148
0149     /*
0150      * Do not shut off CTXLD kick interrupt when shutting VBLANK off. It
0151      * will be needed to commit the last changes, before going to suspend.
0152      */
0153     dcss_crtc->disable_ctxld_kick_irq = false;
0154
0155     drm_crtc_vblank_off(crtc);
0156
0157     pm_runtime_mark_last_busy(dcss->dev);
0158     pm_runtime_put_autosuspend(dcss->dev);
0159 }
0160
0161 static const struct drm_crtc_helper_funcs dcss_helper_funcs = {
0162     .atomic_begin = dcss_crtc_atomic_begin,
0163     .atomic_flush = dcss_crtc_atomic_flush,
0164     .atomic_enable = dcss_crtc_atomic_enable,
0165     .atomic_disable = dcss_crtc_atomic_disable,
0166 };
0167
0168 static irqreturn_t dcss_crtc_irq_handler(int irq, void *dev_id)
0169 {
0170     struct dcss_crtc *dcss_crtc = dev_id;
0171     struct dcss_dev *dcss = dcss_crtc->base.dev->dev_private;
0172
0173     if (!dcss_dtg_vblank_irq_valid(dcss->dtg))
0174         return IRQ_NONE;
0175
0176     if (dcss_ctxld_is_flushed(dcss->ctxld))
0177         drm_crtc_handle_vblank(&dcss_crtc->base);
0178
0179     dcss_dtg_vblank_irq_clear(dcss->dtg);
0180
0181     return IRQ_HANDLED;
0182 }
0183
0184 int dcss_crtc_init(struct dcss_crtc *crtc, struct drm_device *drm)
0185 {
0186     struct dcss_dev *dcss = drm->dev_private;
0187     struct platform_device *pdev = to_platform_device(dcss->dev);
0188     int ret;
0189
0190     crtc->plane[0] = dcss_plane_init(drm, drm_crtc_mask(&crtc->base),
0191                      DRM_PLANE_TYPE_PRIMARY, 0);
0192     if (IS_ERR(crtc->plane[0]))
0193         return PTR_ERR(crtc->plane[0]);
0194
0195     crtc->base.port = dcss->of_port;
0196
0197     drm_crtc_helper_add(&crtc->base, &dcss_helper_funcs);
0198     ret = drm_crtc_init_with_planes(drm, &crtc->base, &crtc->plane[0]->base,
0199                     NULL, &dcss_crtc_funcs, NULL);
0200     if (ret) {
0201         dev_err(dcss->dev, "failed to init crtc\n");
0202         return ret;
0203     }
0204
0205     crtc->irq = platform_get_irq_byname(pdev, "vblank");
0206     if (crtc->irq < 0)
0207         return crtc->irq;
0208
0209     ret = request_irq(crtc->irq, dcss_crtc_irq_handler,
0210               0, "dcss_drm", crtc);
0211     if (ret) {
0212         dev_err(dcss->dev, "irq request failed with %d.\n", ret);
0213         return ret;
0214     }
0215
0216     disable_irq(crtc->irq);
0217
0218     return 0;
0219 }
0220
0221 void dcss_crtc_deinit(struct dcss_crtc *crtc, struct drm_device *drm)
0222 {
0223     free_irq(crtc->irq, crtc);
0224 }