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0006 #include <linux/device.h>
0007 #include <linux/of.h>
0008 #include <linux/slab.h>
0009
0010 #include "dcss-dev.h"
0011
0012 #define DCSS_BLKCTL_RESET_CTRL 0x00
0013 #define B_CLK_RESETN BIT(0)
0014 #define APB_CLK_RESETN BIT(1)
0015 #define P_CLK_RESETN BIT(2)
0016 #define RTR_CLK_RESETN BIT(4)
0017 #define DCSS_BLKCTL_CONTROL0 0x10
0018 #define HDMI_MIPI_CLK_SEL BIT(0)
0019 #define DISPMIX_REFCLK_SEL_POS 4
0020 #define DISPMIX_REFCLK_SEL_MASK GENMASK(5, 4)
0021 #define DISPMIX_PIXCLK_SEL BIT(8)
0022 #define HDMI_SRC_SECURE_EN BIT(16)
0023
0024 struct dcss_blkctl {
0025 struct dcss_dev *dcss;
0026 void __iomem *base_reg;
0027 };
0028
0029 void dcss_blkctl_cfg(struct dcss_blkctl *blkctl)
0030 {
0031 if (blkctl->dcss->hdmi_output)
0032 dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
0033 else
0034 dcss_writel(DISPMIX_PIXCLK_SEL,
0035 blkctl->base_reg + DCSS_BLKCTL_CONTROL0);
0036
0037 dcss_set(B_CLK_RESETN | APB_CLK_RESETN | P_CLK_RESETN | RTR_CLK_RESETN,
0038 blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL);
0039 }
0040
0041 int dcss_blkctl_init(struct dcss_dev *dcss, unsigned long blkctl_base)
0042 {
0043 struct dcss_blkctl *blkctl;
0044
0045 blkctl = kzalloc(sizeof(*blkctl), GFP_KERNEL);
0046 if (!blkctl)
0047 return -ENOMEM;
0048
0049 blkctl->base_reg = ioremap(blkctl_base, SZ_4K);
0050 if (!blkctl->base_reg) {
0051 dev_err(dcss->dev, "unable to remap BLK CTRL base\n");
0052 kfree(blkctl);
0053 return -ENOMEM;
0054 }
0055
0056 dcss->blkctl = blkctl;
0057 blkctl->dcss = dcss;
0058
0059 dcss_blkctl_cfg(blkctl);
0060
0061 return 0;
0062 }
0063
0064 void dcss_blkctl_exit(struct dcss_blkctl *blkctl)
0065 {
0066 if (blkctl->base_reg)
0067 iounmap(blkctl->base_reg);
0068
0069 kfree(blkctl);
0070 }