drm/i915/vlv_sideband.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2013-2021 Intel Corporation
0004  */
0005
0006 #ifndef _VLV_SIDEBAND_H_
0007 #define _VLV_SIDEBAND_H_
0008
0009 #include <linux/bitops.h>
0010 #include <linux/types.h>
0011
0012 #include "vlv_sideband_reg.h"
0013
0014 enum pipe;
0015 struct drm_i915_private;
0016
0017 enum {
0018     VLV_IOSF_SB_BUNIT,
0019     VLV_IOSF_SB_CCK,
0020     VLV_IOSF_SB_CCU,
0021     VLV_IOSF_SB_DPIO,
0022     VLV_IOSF_SB_FLISDSI,
0023     VLV_IOSF_SB_GPIO,
0024     VLV_IOSF_SB_NC,
0025     VLV_IOSF_SB_PUNIT,
0026 };
0027
0028 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
0029 u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg);
0030 void vlv_iosf_sb_write(struct drm_i915_private *i915,
0031                u8 port, u32 reg, u32 val);
0032 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
0033
0034 static inline void vlv_bunit_get(struct drm_i915_private *i915)
0035 {
0036     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT));
0037 }
0038
0039 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
0040 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
0041
0042 static inline void vlv_bunit_put(struct drm_i915_private *i915)
0043 {
0044     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT));
0045 }
0046
0047 static inline void vlv_cck_get(struct drm_i915_private *i915)
0048 {
0049     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCK));
0050 }
0051
0052 u32 vlv_cck_read(struct drm_i915_private *i915, u32 reg);
0053 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val);
0054
0055 static inline void vlv_cck_put(struct drm_i915_private *i915)
0056 {
0057     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCK));
0058 }
0059
0060 static inline void vlv_ccu_get(struct drm_i915_private *i915)
0061 {
0062     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_CCU));
0063 }
0064
0065 u32 vlv_ccu_read(struct drm_i915_private *i915, u32 reg);
0066 void vlv_ccu_write(struct drm_i915_private *i915, u32 reg, u32 val);
0067
0068 static inline void vlv_ccu_put(struct drm_i915_private *i915)
0069 {
0070     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_CCU));
0071 }
0072
0073 static inline void vlv_dpio_get(struct drm_i915_private *i915)
0074 {
0075     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_DPIO));
0076 }
0077
0078 u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg);
0079 void vlv_dpio_write(struct drm_i915_private *i915,
0080             enum pipe pipe, int reg, u32 val);
0081
0082 static inline void vlv_dpio_put(struct drm_i915_private *i915)
0083 {
0084     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_DPIO));
0085 }
0086
0087 static inline void vlv_flisdsi_get(struct drm_i915_private *i915)
0088 {
0089     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_FLISDSI));
0090 }
0091
0092 u32 vlv_flisdsi_read(struct drm_i915_private *i915, u32 reg);
0093 void vlv_flisdsi_write(struct drm_i915_private *i915, u32 reg, u32 val);
0094
0095 static inline void vlv_flisdsi_put(struct drm_i915_private *i915)
0096 {
0097     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_FLISDSI));
0098 }
0099
0100 static inline void vlv_nc_get(struct drm_i915_private *i915)
0101 {
0102     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_NC));
0103 }
0104
0105 u32 vlv_nc_read(struct drm_i915_private *i915, u8 addr);
0106
0107 static inline void vlv_nc_put(struct drm_i915_private *i915)
0108 {
0109     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_NC));
0110 }
0111
0112 static inline void vlv_punit_get(struct drm_i915_private *i915)
0113 {
0114     vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_PUNIT));
0115 }
0116
0117 u32 vlv_punit_read(struct drm_i915_private *i915, u32 addr);
0118 int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val);
0119
0120 static inline void vlv_punit_put(struct drm_i915_private *i915)
0121 {
0122     vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT));
0123 }
0124
0125 #endif /* _VLV_SIDEBAND_H_ */