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0027 #include "display/intel_de.h"
0028 #include "display/intel_gmbus.h"
0029 #include "display/intel_vga.h"
0030
0031 #include "i915_drv.h"
0032 #include "i915_reg.h"
0033 #include "i915_suspend.h"
0034 #include "intel_pci_config.h"
0035
0036 static void intel_save_swf(struct drm_i915_private *dev_priv)
0037 {
0038 int i;
0039
0040
0041 if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
0042 for (i = 0; i < 7; i++) {
0043 dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
0044 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
0045 }
0046 for (i = 0; i < 3; i++)
0047 dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
0048 } else if (GRAPHICS_VER(dev_priv) == 2) {
0049 for (i = 0; i < 7; i++)
0050 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
0051 } else if (HAS_GMCH(dev_priv)) {
0052 for (i = 0; i < 16; i++) {
0053 dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
0054 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
0055 }
0056 for (i = 0; i < 3; i++)
0057 dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
0058 }
0059 }
0060
0061 static void intel_restore_swf(struct drm_i915_private *dev_priv)
0062 {
0063 int i;
0064
0065
0066 if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
0067 for (i = 0; i < 7; i++) {
0068 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
0069 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
0070 }
0071 for (i = 0; i < 3; i++)
0072 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
0073 } else if (GRAPHICS_VER(dev_priv) == 2) {
0074 for (i = 0; i < 7; i++)
0075 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
0076 } else if (HAS_GMCH(dev_priv)) {
0077 for (i = 0; i < 16; i++) {
0078 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
0079 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
0080 }
0081 for (i = 0; i < 3; i++)
0082 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
0083 }
0084 }
0085
0086 void i915_save_display(struct drm_i915_private *dev_priv)
0087 {
0088 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
0089
0090 if (!HAS_DISPLAY(dev_priv))
0091 return;
0092
0093
0094 if (GRAPHICS_VER(dev_priv) <= 4)
0095 dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv, DSPARB);
0096
0097 if (GRAPHICS_VER(dev_priv) == 4)
0098 pci_read_config_word(pdev, GCDGMBUS,
0099 &dev_priv->regfile.saveGCDGMBUS);
0100
0101 intel_save_swf(dev_priv);
0102 }
0103
0104 void i915_restore_display(struct drm_i915_private *dev_priv)
0105 {
0106 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
0107
0108 if (!HAS_DISPLAY(dev_priv))
0109 return;
0110
0111 intel_restore_swf(dev_priv);
0112
0113 if (GRAPHICS_VER(dev_priv) == 4)
0114 pci_write_config_word(pdev, GCDGMBUS,
0115 dev_priv->regfile.saveGCDGMBUS);
0116
0117
0118 if (GRAPHICS_VER(dev_priv) <= 4)
0119 intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB);
0120
0121 intel_vga_redisable(dev_priv);
0122
0123 intel_gmbus_reset(dev_priv);
0124 }