drm/i915/i915_perf_oa_regs.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2022 Intel Corporation
0004  */
0005
0006 #ifndef __INTEL_PERF_OA_REGS__
0007 #define __INTEL_PERF_OA_REGS__
0008
0009 #include "i915_reg_defs.h"
0010
0011 #define GEN7_OACONTROL _MMIO(0x2360)
0012 #define  GEN7_OACONTROL_CTX_MASK        0xFFFFF000
0013 #define  GEN7_OACONTROL_TIMER_PERIOD_MASK   0x3F
0014 #define  GEN7_OACONTROL_TIMER_PERIOD_SHIFT  6
0015 #define  GEN7_OACONTROL_TIMER_ENABLE        (1 << 5)
0016 #define  GEN7_OACONTROL_FORMAT_A13      (0 << 2)
0017 #define  GEN7_OACONTROL_FORMAT_A29      (1 << 2)
0018 #define  GEN7_OACONTROL_FORMAT_A13_B8_C8    (2 << 2)
0019 #define  GEN7_OACONTROL_FORMAT_A29_B8_C8    (3 << 2)
0020 #define  GEN7_OACONTROL_FORMAT_B4_C8        (4 << 2)
0021 #define  GEN7_OACONTROL_FORMAT_A45_B8_C8    (5 << 2)
0022 #define  GEN7_OACONTROL_FORMAT_B4_C8_A16    (6 << 2)
0023 #define  GEN7_OACONTROL_FORMAT_C4_B8        (7 << 2)
0024 #define  GEN7_OACONTROL_FORMAT_SHIFT        2
0025 #define  GEN7_OACONTROL_PER_CTX_ENABLE      (1 << 1)
0026 #define  GEN7_OACONTROL_ENABLE          (1 << 0)
0027
0028 #define GEN8_OACTXID _MMIO(0x2364)
0029
0030 #define GEN8_OA_DEBUG _MMIO(0x2B04)
0031 #define  GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS    (1 << 5)
0032 #define  GEN9_OA_DEBUG_INCLUDE_CLK_RATIO        (1 << 6)
0033 #define  GEN9_OA_DEBUG_DISABLE_GO_1_0_REPORTS       (1 << 2)
0034 #define  GEN9_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS   (1 << 1)
0035
0036 #define GEN8_OACONTROL _MMIO(0x2B00)
0037 #define  GEN8_OA_REPORT_FORMAT_A12      (0 << 2)
0038 #define  GEN8_OA_REPORT_FORMAT_A12_B8_C8    (2 << 2)
0039 #define  GEN8_OA_REPORT_FORMAT_A36_B8_C8    (5 << 2)
0040 #define  GEN8_OA_REPORT_FORMAT_C4_B8        (7 << 2)
0041 #define  GEN8_OA_REPORT_FORMAT_SHIFT        2
0042 #define  GEN8_OA_SPECIFIC_CONTEXT_ENABLE    (1 << 1)
0043 #define  GEN8_OA_COUNTER_ENABLE             (1 << 0)
0044
0045 #define GEN8_OACTXCONTROL _MMIO(0x2360)
0046 #define  GEN8_OA_TIMER_PERIOD_MASK      0x3F
0047 #define  GEN8_OA_TIMER_PERIOD_SHIFT     2
0048 #define  GEN8_OA_TIMER_ENABLE           (1 << 1)
0049 #define  GEN8_OA_COUNTER_RESUME         (1 << 0)
0050
0051 #define GEN7_OABUFFER _MMIO(0x23B0) /* R/W */
0052 #define  GEN7_OABUFFER_OVERRUN_DISABLE      (1 << 3)
0053 #define  GEN7_OABUFFER_EDGE_TRIGGER     (1 << 2)
0054 #define  GEN7_OABUFFER_STOP_RESUME_ENABLE   (1 << 1)
0055 #define  GEN7_OABUFFER_RESUME           (1 << 0)
0056
0057 #define GEN8_OABUFFER_UDW _MMIO(0x23b4)
0058 #define GEN8_OABUFFER _MMIO(0x2b14)
0059 #define  GEN8_OABUFFER_MEM_SELECT_GGTT      (1 << 0)  /* 0: PPGTT, 1: GGTT */
0060
0061 #define GEN7_OASTATUS1 _MMIO(0x2364)
0062 #define  GEN7_OASTATUS1_TAIL_MASK       0xffffffc0
0063 #define  GEN7_OASTATUS1_COUNTER_OVERFLOW    (1 << 2)
0064 #define  GEN7_OASTATUS1_OABUFFER_OVERFLOW   (1 << 1)
0065 #define  GEN7_OASTATUS1_REPORT_LOST     (1 << 0)
0066
0067 #define GEN7_OASTATUS2 _MMIO(0x2368)
0068 #define  GEN7_OASTATUS2_HEAD_MASK           0xffffffc0
0069 #define  GEN7_OASTATUS2_MEM_SELECT_GGTT     (1 << 0) /* 0: PPGTT, 1: GGTT */
0070
0071 #define GEN8_OASTATUS _MMIO(0x2b08)
0072 #define  GEN8_OASTATUS_TAIL_POINTER_WRAP    (1 << 17)
0073 #define  GEN8_OASTATUS_HEAD_POINTER_WRAP    (1 << 16)
0074 #define  GEN8_OASTATUS_OVERRUN_STATUS       (1 << 3)
0075 #define  GEN8_OASTATUS_COUNTER_OVERFLOW     (1 << 2)
0076 #define  GEN8_OASTATUS_OABUFFER_OVERFLOW    (1 << 1)
0077 #define  GEN8_OASTATUS_REPORT_LOST      (1 << 0)
0078
0079 #define GEN8_OAHEADPTR _MMIO(0x2B0C)
0080 #define GEN8_OAHEADPTR_MASK    0xffffffc0
0081 #define GEN8_OATAILPTR _MMIO(0x2B10)
0082 #define GEN8_OATAILPTR_MASK    0xffffffc0
0083
0084 #define OABUFFER_SIZE_128K  (0 << 3)
0085 #define OABUFFER_SIZE_256K  (1 << 3)
0086 #define OABUFFER_SIZE_512K  (2 << 3)
0087 #define OABUFFER_SIZE_1M    (3 << 3)
0088 #define OABUFFER_SIZE_2M    (4 << 3)
0089 #define OABUFFER_SIZE_4M    (5 << 3)
0090 #define OABUFFER_SIZE_8M    (6 << 3)
0091 #define OABUFFER_SIZE_16M   (7 << 3)
0092
0093 #define GEN12_OA_TLB_INV_CR _MMIO(0xceec)
0094
0095 /* Gen12 OAR unit */
0096 #define GEN12_OAR_OACONTROL _MMIO(0x2960)
0097 #define  GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT 1
0098 #define  GEN12_OAR_OACONTROL_COUNTER_ENABLE       (1 << 0)
0099
0100 #define GEN12_OACTXCONTROL _MMIO(0x2360)
0101 #define GEN12_OAR_OASTATUS _MMIO(0x2968)
0102
0103 /* Gen12 OAG unit */
0104 #define GEN12_OAG_OAHEADPTR _MMIO(0xdb00)
0105 #define  GEN12_OAG_OAHEADPTR_MASK 0xffffffc0
0106 #define GEN12_OAG_OATAILPTR _MMIO(0xdb04)
0107 #define  GEN12_OAG_OATAILPTR_MASK 0xffffffc0
0108
0109 #define GEN12_OAG_OABUFFER  _MMIO(0xdb08)
0110 #define  GEN12_OAG_OABUFFER_BUFFER_SIZE_MASK  (0x7)
0111 #define  GEN12_OAG_OABUFFER_BUFFER_SIZE_SHIFT (3)
0112 #define  GEN12_OAG_OABUFFER_MEMORY_SELECT     (1 << 0) /* 0: PPGTT, 1: GGTT */
0113
0114 #define GEN12_OAG_OAGLBCTXCTRL _MMIO(0x2b28)
0115 #define  GEN12_OAG_OAGLBCTXCTRL_TIMER_PERIOD_SHIFT 2
0116 #define  GEN12_OAG_OAGLBCTXCTRL_TIMER_ENABLE       (1 << 1)
0117 #define  GEN12_OAG_OAGLBCTXCTRL_COUNTER_RESUME     (1 << 0)
0118
0119 #define GEN12_OAG_OACONTROL _MMIO(0xdaf4)
0120 #define  GEN12_OAG_OACONTROL_OA_COUNTER_FORMAT_SHIFT 2
0121 #define  GEN12_OAG_OACONTROL_OA_COUNTER_ENABLE       (1 << 0)
0122
0123 #define GEN12_OAG_OA_DEBUG _MMIO(0xdaf8)
0124 #define  GEN12_OAG_OA_DEBUG_INCLUDE_CLK_RATIO          (1 << 6)
0125 #define  GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS  (1 << 5)
0126 #define  GEN12_OAG_OA_DEBUG_DISABLE_GO_1_0_REPORTS     (1 << 2)
0127 #define  GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS (1 << 1)
0128
0129 #define GEN12_OAG_OASTATUS _MMIO(0xdafc)
0130 #define  GEN12_OAG_OASTATUS_COUNTER_OVERFLOW (1 << 2)
0131 #define  GEN12_OAG_OASTATUS_BUFFER_OVERFLOW  (1 << 1)
0132 #define  GEN12_OAG_OASTATUS_REPORT_LOST      (1 << 0)
0133
0134 #define GDT_CHICKEN_BITS    _MMIO(0x9840)
0135 #define   GT_NOA_ENABLE     0x00000080
0136
0137 #endif /* __INTEL_PERF_OA_REGS__ */