drm/i915/i915_gem_gtt.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2020 Intel Corporation
0004  */
0005
0006 #ifndef __I915_GEM_GTT_H__
0007 #define __I915_GEM_GTT_H__
0008
0009 #include <linux/io-mapping.h>
0010 #include <linux/types.h>
0011
0012 #include <drm/drm_mm.h>
0013
0014 #include "gt/intel_gtt.h"
0015 #include "i915_scatterlist.h"
0016
0017 struct drm_i915_gem_object;
0018 struct i915_address_space;
0019 struct i915_gem_ww_ctx;
0020
0021 int __must_check i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
0022                         struct sg_table *pages);
0023 void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
0024                    struct sg_table *pages);
0025
0026 int i915_gem_gtt_reserve(struct i915_address_space *vm,
0027              struct i915_gem_ww_ctx *ww,
0028              struct drm_mm_node *node,
0029              u64 size, u64 offset, unsigned long color,
0030              unsigned int flags);
0031
0032 int i915_gem_gtt_insert(struct i915_address_space *vm,
0033             struct i915_gem_ww_ctx *ww,
0034             struct drm_mm_node *node,
0035             u64 size, u64 alignment, unsigned long color,
0036             u64 start, u64 end, unsigned int flags);
0037
0038 /* Flags used by pin/bind&friends. */
0039 #define PIN_NOEVICT     BIT_ULL(0)
0040 #define PIN_NOSEARCH        BIT_ULL(1)
0041 #define PIN_NONBLOCK        BIT_ULL(2)
0042 #define PIN_MAPPABLE        BIT_ULL(3)
0043 #define PIN_ZONE_4G     BIT_ULL(4)
0044 #define PIN_HIGH        BIT_ULL(5)
0045 #define PIN_OFFSET_BIAS     BIT_ULL(6)
0046 #define PIN_OFFSET_FIXED    BIT_ULL(7)
0047 #define PIN_VALIDATE        BIT_ULL(8) /* validate placement only, no need to call unpin() */
0048
0049 #define PIN_GLOBAL      BIT_ULL(10) /* I915_VMA_GLOBAL_BIND */
0050 #define PIN_USER        BIT_ULL(11) /* I915_VMA_LOCAL_BIND */
0051
0052 #define PIN_OFFSET_MASK     I915_GTT_PAGE_MASK
0053
0054 #endif