i915/gvt/opregion.c

0001 /*
0002  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice (including the next
0012  * paragraph) shall be included in all copies or substantial portions of the
0013  * Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
0019  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
0020  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
0021  * SOFTWARE.
0022  */
0023
0024 #include <linux/acpi.h>
0025 #include "i915_drv.h"
0026 #include "gvt.h"
0027
0028 /*
0029  * Note: Only for GVT-g virtual VBT generation, other usage must
0030  * not do like this.
0031  */
0032 #define _INTEL_BIOS_PRIVATE
0033 #include "display/intel_vbt_defs.h"
0034
0035 #define OPREGION_SIGNATURE "IntelGraphicsMem"
0036 #define MBOX_VBT      (1<<3)
0037
0038 /* device handle */
0039 #define DEVICE_TYPE_CRT    0x01
0040 #define DEVICE_TYPE_EFP1   0x04
0041 #define DEVICE_TYPE_EFP2   0x40
0042 #define DEVICE_TYPE_EFP3   0x20
0043 #define DEVICE_TYPE_EFP4   0x10
0044
0045 struct opregion_header {
0046     u8 signature[16];
0047     u32 size;
0048     u32 opregion_ver;
0049     u8 bios_ver[32];
0050     u8 vbios_ver[16];
0051     u8 driver_ver[16];
0052     u32 mboxes;
0053     u32 driver_model;
0054     u32 pcon;
0055     u8 dver[32];
0056     u8 rsvd[124];
0057 } __packed;
0058
0059 struct bdb_data_header {
0060     u8 id;
0061     u16 size; /* data size */
0062 } __packed;
0063
0064 /* For supporting windows guest with opregion, here hardcode the emulated
0065  * bdb header version as '186', and the corresponding child_device_config
0066  * length should be '33' but not '38'.
0067  */
0068 struct efp_child_device_config {
0069     u16 handle;
0070     u16 device_type;
0071     u16 device_class;
0072     u8 i2c_speed;
0073     u8 dp_onboard_redriver; /* 158 */
0074     u8 dp_ondock_redriver; /* 158 */
0075     u8 hdmi_level_shifter_value:4; /* 169 */
0076     u8 hdmi_max_data_rate:4; /* 204 */
0077     u16 dtd_buf_ptr; /* 161 */
0078     u8 edidless_efp:1; /* 161 */
0079     u8 compression_enable:1; /* 198 */
0080     u8 compression_method:1; /* 198 */
0081     u8 ganged_edp:1; /* 202 */
0082     u8 skip0:4;
0083     u8 compression_structure_index:4; /* 198 */
0084     u8 skip1:4;
0085     u8 slave_port; /*  202 */
0086     u8 skip2;
0087     u8 dvo_port;
0088     u8 i2c_pin; /* for add-in card */
0089     u8 slave_addr; /* for add-in card */
0090     u8 ddc_pin;
0091     u16 edid_ptr;
0092     u8 dvo_config;
0093     u8 efp_docked_port:1; /* 158 */
0094     u8 lane_reversal:1; /* 184 */
0095     u8 onboard_lspcon:1; /* 192 */
0096     u8 iboost_enable:1; /* 196 */
0097     u8 hpd_invert:1; /* BXT 196 */
0098     u8 slip3:3;
0099     u8 hdmi_compat:1;
0100     u8 dp_compat:1;
0101     u8 tmds_compat:1;
0102     u8 skip4:5;
0103     u8 aux_channel;
0104     u8 dongle_detect;
0105     u8 pipe_cap:2;
0106     u8 sdvo_stall:1; /* 158 */
0107     u8 hpd_status:2;
0108     u8 integrated_encoder:1;
0109     u8 skip5:2;
0110     u8 dvo_wiring;
0111     u8 mipi_bridge_type; /* 171 */
0112     u16 device_class_ext;
0113     u8 dvo_function;
0114 } __packed;
0115
0116 struct vbt {
0117     /* header->bdb_offset point to bdb_header offset */
0118     struct vbt_header header;
0119     struct bdb_header bdb_header;
0120
0121     struct bdb_data_header general_features_header;
0122     struct bdb_general_features general_features;
0123
0124     struct bdb_data_header general_definitions_header;
0125     struct bdb_general_definitions general_definitions;
0126
0127     struct efp_child_device_config child0;
0128     struct efp_child_device_config child1;
0129     struct efp_child_device_config child2;
0130     struct efp_child_device_config child3;
0131
0132     struct bdb_data_header driver_features_header;
0133     struct bdb_driver_features driver_features;
0134 };
0135
0136 static void virt_vbt_generation(struct vbt *v)
0137 {
0138     int num_child;
0139
0140     memset(v, 0, sizeof(struct vbt));
0141
0142     v->header.signature[0] = '$';
0143     v->header.signature[1] = 'V';
0144     v->header.signature[2] = 'B';
0145     v->header.signature[3] = 'T';
0146
0147     /* there's features depending on version! */
0148     v->header.version = 155;
0149     v->header.header_size = sizeof(v->header);
0150     v->header.vbt_size = sizeof(struct vbt);
0151     v->header.bdb_offset = offsetof(struct vbt, bdb_header);
0152
0153     strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK");
0154     v->bdb_header.version = 186; /* child_dev_size = 33 */
0155     v->bdb_header.header_size = sizeof(v->bdb_header);
0156
0157     v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header);
0158
0159     /* general features */
0160     v->general_features_header.id = BDB_GENERAL_FEATURES;
0161     v->general_features_header.size = sizeof(struct bdb_general_features);
0162     v->general_features.int_crt_support = 0;
0163     v->general_features.int_tv_support = 0;
0164
0165     /* child device */
0166     num_child = 4; /* each port has one child */
0167     v->general_definitions.child_dev_size =
0168         sizeof(struct efp_child_device_config);
0169     v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS;
0170     /* size will include child devices */
0171     v->general_definitions_header.size =
0172         sizeof(struct bdb_general_definitions) +
0173             num_child * v->general_definitions.child_dev_size;
0174
0175     /* portA */
0176     v->child0.handle = DEVICE_TYPE_EFP1;
0177     v->child0.device_type = DEVICE_TYPE_DP;
0178     v->child0.dvo_port = DVO_PORT_DPA;
0179     v->child0.aux_channel = DP_AUX_A;
0180     v->child0.dp_compat = true;
0181     v->child0.integrated_encoder = true;
0182
0183     /* portB */
0184     v->child1.handle = DEVICE_TYPE_EFP2;
0185     v->child1.device_type = DEVICE_TYPE_DP;
0186     v->child1.dvo_port = DVO_PORT_DPB;
0187     v->child1.aux_channel = DP_AUX_B;
0188     v->child1.dp_compat = true;
0189     v->child1.integrated_encoder = true;
0190
0191     /* portC */
0192     v->child2.handle = DEVICE_TYPE_EFP3;
0193     v->child2.device_type = DEVICE_TYPE_DP;
0194     v->child2.dvo_port = DVO_PORT_DPC;
0195     v->child2.aux_channel = DP_AUX_C;
0196     v->child2.dp_compat = true;
0197     v->child2.integrated_encoder = true;
0198
0199     /* portD */
0200     v->child3.handle = DEVICE_TYPE_EFP4;
0201     v->child3.device_type = DEVICE_TYPE_DP;
0202     v->child3.dvo_port = DVO_PORT_DPD;
0203     v->child3.aux_channel = DP_AUX_D;
0204     v->child3.dp_compat = true;
0205     v->child3.integrated_encoder = true;
0206
0207     /* driver features */
0208     v->driver_features_header.id = BDB_DRIVER_FEATURES;
0209     v->driver_features_header.size = sizeof(struct bdb_driver_features);
0210     v->driver_features.lvds_config = BDB_DRIVER_FEATURE_NO_LVDS;
0211 }
0212
0213 /**
0214  * intel_vgpu_init_opregion - initialize the stuff used to emulate opregion
0215  * @vgpu: a vGPU
0216  *
0217  * Returns:
0218  * Zero on success, negative error code if failed.
0219  */
0220 int intel_vgpu_init_opregion(struct intel_vgpu *vgpu)
0221 {
0222     u8 *buf;
0223     struct opregion_header *header;
0224     struct vbt v;
0225     const char opregion_signature[16] = OPREGION_SIGNATURE;
0226
0227     gvt_dbg_core("init vgpu%d opregion\n", vgpu->id);
0228     vgpu_opregion(vgpu)->va = (void *)__get_free_pages(GFP_KERNEL |
0229             __GFP_ZERO,
0230             get_order(INTEL_GVT_OPREGION_SIZE));
0231     if (!vgpu_opregion(vgpu)->va) {
0232         gvt_err("fail to get memory for vgpu virt opregion\n");
0233         return -ENOMEM;
0234     }
0235
0236     /* emulated opregion with VBT mailbox only */
0237     buf = (u8 *)vgpu_opregion(vgpu)->va;
0238     header = (struct opregion_header *)buf;
0239     memcpy(header->signature, opregion_signature,
0240            sizeof(opregion_signature));
0241     header->size = 0x8;
0242     header->opregion_ver = 0x02000000;
0243     header->mboxes = MBOX_VBT;
0244
0245     /* for unknown reason, the value in LID field is incorrect
0246      * which block the windows guest, so workaround it by force
0247      * setting it to "OPEN"
0248      */
0249     buf[INTEL_GVT_OPREGION_CLID] = 0x3;
0250
0251     /* emulated vbt from virt vbt generation */
0252     virt_vbt_generation(&v);
0253     memcpy(buf + INTEL_GVT_OPREGION_VBT_OFFSET, &v, sizeof(struct vbt));
0254
0255     return 0;
0256 }
0257
0258 /**
0259  * intel_vgpu_opregion_base_write_handler - Opregion base register write handler
0260  *
0261  * @vgpu: a vGPU
0262  * @gpa: guest physical address of opregion
0263  *
0264  * Returns:
0265  * Zero on success, negative error code if failed.
0266  */
0267 int intel_vgpu_opregion_base_write_handler(struct intel_vgpu *vgpu, u32 gpa)
0268 {
0269
0270     int i;
0271
0272     gvt_dbg_core("emulate opregion from kernel\n");
0273
0274     for (i = 0; i < INTEL_GVT_OPREGION_PAGES; i++)
0275         vgpu_opregion(vgpu)->gfn[i] = (gpa >> PAGE_SHIFT) + i;
0276     return 0;
0277 }
0278
0279 /**
0280  * intel_vgpu_clean_opregion - clean the stuff used to emulate opregion
0281  * @vgpu: a vGPU
0282  *
0283  */
0284 void intel_vgpu_clean_opregion(struct intel_vgpu *vgpu)
0285 {
0286     gvt_dbg_core("vgpu%d: clean vgpu opregion\n", vgpu->id);
0287
0288     if (!vgpu_opregion(vgpu)->va)
0289         return;
0290
0291     /* Guest opregion is released by VFIO */
0292     free_pages((unsigned long)vgpu_opregion(vgpu)->va,
0293            get_order(INTEL_GVT_OPREGION_SIZE));
0294
0295     vgpu_opregion(vgpu)->va = NULL;
0296
0297 }
0298
0299
0300 #define GVT_OPREGION_FUNC(scic)                 \
0301     ({                          \
0302      u32 __ret;                     \
0303      __ret = (scic & OPREGION_SCIC_FUNC_MASK) >>        \
0304      OPREGION_SCIC_FUNC_SHIFT;              \
0305      __ret;                         \
0306      })
0307
0308 #define GVT_OPREGION_SUBFUNC(scic)              \
0309     ({                          \
0310      u32 __ret;                     \
0311      __ret = (scic & OPREGION_SCIC_SUBFUNC_MASK) >>     \
0312      OPREGION_SCIC_SUBFUNC_SHIFT;               \
0313      __ret;                         \
0314      })
0315
0316 static const char *opregion_func_name(u32 func)
0317 {
0318     const char *name = NULL;
0319
0320     switch (func) {
0321     case 0 ... 3:
0322     case 5:
0323     case 7 ... 15:
0324         name = "Reserved";
0325         break;
0326
0327     case 4:
0328         name = "Get BIOS Data";
0329         break;
0330
0331     case 6:
0332         name = "System BIOS Callbacks";
0333         break;
0334
0335     default:
0336         name = "Unknown";
0337         break;
0338     }
0339     return name;
0340 }
0341
0342 static const char *opregion_subfunc_name(u32 subfunc)
0343 {
0344     const char *name = NULL;
0345
0346     switch (subfunc) {
0347     case 0:
0348         name = "Supported Calls";
0349         break;
0350
0351     case 1:
0352         name = "Requested Callbacks";
0353         break;
0354
0355     case 2 ... 3:
0356     case 8 ... 9:
0357         name = "Reserved";
0358         break;
0359
0360     case 5:
0361         name = "Boot Display";
0362         break;
0363
0364     case 6:
0365         name = "TV-Standard/Video-Connector";
0366         break;
0367
0368     case 7:
0369         name = "Internal Graphics";
0370         break;
0371
0372     case 10:
0373         name = "Spread Spectrum Clocks";
0374         break;
0375
0376     case 11:
0377         name = "Get AKSV";
0378         break;
0379
0380     default:
0381         name = "Unknown";
0382         break;
0383     }
0384     return name;
0385 };
0386
0387 static bool querying_capabilities(u32 scic)
0388 {
0389     u32 func, subfunc;
0390
0391     func = GVT_OPREGION_FUNC(scic);
0392     subfunc = GVT_OPREGION_SUBFUNC(scic);
0393
0394     if ((func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
0395         subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)
0396         || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSDATA &&
0397          subfunc == INTEL_GVT_OPREGION_SCIC_SF_REQEUSTEDCALLBACKS)
0398         || (func == INTEL_GVT_OPREGION_SCIC_F_GETBIOSCALLBACKS &&
0399          subfunc == INTEL_GVT_OPREGION_SCIC_SF_SUPPRTEDCALLS)) {
0400         return true;
0401     }
0402     return false;
0403 }
0404
0405 /**
0406  * intel_vgpu_emulate_opregion_request - emulating OpRegion request
0407  * @vgpu: a vGPU
0408  * @swsci: SWSCI request
0409  *
0410  * Returns:
0411  * Zero on success, negative error code if failed
0412  */
0413 int intel_vgpu_emulate_opregion_request(struct intel_vgpu *vgpu, u32 swsci)
0414 {
0415     u32 scic, parm;
0416     u32 func, subfunc;
0417     u64 scic_pa = 0, parm_pa = 0;
0418     int ret;
0419
0420     scic_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
0421                 INTEL_GVT_OPREGION_SCIC;
0422     parm_pa = (vgpu_opregion(vgpu)->gfn[0] << PAGE_SHIFT) +
0423                 INTEL_GVT_OPREGION_PARM;
0424     ret = intel_gvt_read_gpa(vgpu, scic_pa, &scic, sizeof(scic));
0425     if (ret) {
0426         gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
0427             ret, scic_pa, sizeof(scic));
0428         return ret;
0429     }
0430
0431     ret = intel_gvt_read_gpa(vgpu, parm_pa, &parm, sizeof(parm));
0432     if (ret) {
0433         gvt_vgpu_err("guest opregion read error %d, gpa 0x%llx, len %lu\n",
0434             ret, scic_pa, sizeof(scic));
0435         return ret;
0436     }
0437
0438     if (!(swsci & SWSCI_SCI_SELECT)) {
0439         gvt_vgpu_err("requesting SMI service\n");
0440         return 0;
0441     }
0442     /* ignore non 0->1 trasitions */
0443     if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI]
0444                 & SWSCI_SCI_TRIGGER) ||
0445             !(swsci & SWSCI_SCI_TRIGGER)) {
0446         return 0;
0447     }
0448
0449     func = GVT_OPREGION_FUNC(scic);
0450     subfunc = GVT_OPREGION_SUBFUNC(scic);
0451     if (!querying_capabilities(scic)) {
0452         gvt_vgpu_err("requesting runtime service: func \"%s\","
0453                 " subfunc \"%s\"\n",
0454                 opregion_func_name(func),
0455                 opregion_subfunc_name(subfunc));
0456         /*
0457          * emulate exit status of function call, '0' means
0458          * "failure, generic, unsupported or unknown cause"
0459          */
0460         scic &= ~OPREGION_SCIC_EXIT_MASK;
0461         goto out;
0462     }
0463
0464     scic = 0;
0465     parm = 0;
0466
0467 out:
0468     ret = intel_gvt_write_gpa(vgpu, scic_pa, &scic, sizeof(scic));
0469     if (ret) {
0470         gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
0471             ret, scic_pa, sizeof(scic));
0472         return ret;
0473     }
0474
0475     ret = intel_gvt_write_gpa(vgpu, parm_pa, &parm, sizeof(parm));
0476     if (ret) {
0477         gvt_vgpu_err("guest opregion write error %d, gpa 0x%llx, len %lu\n",
0478             ret, scic_pa, sizeof(scic));
0479         return ret;
0480     }
0481
0482     return 0;
0483 }