i915/gt/selftest_llc.c

0001 // SPDX-License-Identifier: MIT
0002 /*
0003  * Copyright © 2019 Intel Corporation
0004  */
0005
0006 #include "intel_pm.h" /* intel_gpu_freq() */
0007 #include "selftest_llc.h"
0008 #include "intel_rps.h"
0009
0010 static int gen6_verify_ring_freq(struct intel_llc *llc)
0011 {
0012     struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
0013     struct ia_constants consts;
0014     intel_wakeref_t wakeref;
0015     unsigned int gpu_freq;
0016     int err = 0;
0017
0018     wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm);
0019
0020     if (!get_ia_constants(llc, &consts))
0021         goto out_rpm;
0022
0023     for (gpu_freq = consts.min_gpu_freq;
0024          gpu_freq <= consts.max_gpu_freq;
0025          gpu_freq++) {
0026         struct intel_rps *rps = &llc_to_gt(llc)->rps;
0027
0028         unsigned int ia_freq, ring_freq, found;
0029         u32 val;
0030
0031         calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq);
0032
0033         val = gpu_freq;
0034         if (snb_pcode_read(llc_to_gt(llc)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE,
0035                    &val, NULL)) {
0036             pr_err("Failed to read freq table[%d], range [%d, %d]\n",
0037                    gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq);
0038             err = -ENXIO;
0039             break;
0040         }
0041
0042         found = (val >> 0) & 0xff;
0043         if (found != ia_freq) {
0044             pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n",
0045                    gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
0046                    intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
0047                    found, ia_freq);
0048             err = -EINVAL;
0049             break;
0050         }
0051
0052         found = (val >> 8) & 0xff;
0053         if (found != ring_freq) {
0054             pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n",
0055                    gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq,
0056                    intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)),
0057                    found, ring_freq);
0058             err = -EINVAL;
0059             break;
0060         }
0061     }
0062
0063 out_rpm:
0064     intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref);
0065     return err;
0066 }
0067
0068 int st_llc_verify(struct intel_llc *llc)
0069 {
0070     return gen6_verify_ring_freq(llc);
0071 }