i915/gt/intel_timeline.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2016 Intel Corporation
0004  */
0005
0006 #ifndef I915_TIMELINE_H
0007 #define I915_TIMELINE_H
0008
0009 #include <linux/lockdep.h>
0010
0011 #include "i915_active.h"
0012 #include "i915_syncmap.h"
0013 #include "intel_timeline_types.h"
0014
0015 struct drm_printer;
0016
0017 struct intel_timeline *
0018 __intel_timeline_create(struct intel_gt *gt,
0019             struct i915_vma *global_hwsp,
0020             unsigned int offset);
0021
0022 static inline struct intel_timeline *
0023 intel_timeline_create(struct intel_gt *gt)
0024 {
0025     return __intel_timeline_create(gt, NULL, 0);
0026 }
0027
0028 struct intel_timeline *
0029 intel_timeline_create_from_engine(struct intel_engine_cs *engine,
0030                   unsigned int offset);
0031
0032 static inline struct intel_timeline *
0033 intel_timeline_get(struct intel_timeline *timeline)
0034 {
0035     kref_get(&timeline->kref);
0036     return timeline;
0037 }
0038
0039 void __intel_timeline_free(struct kref *kref);
0040 static inline void intel_timeline_put(struct intel_timeline *timeline)
0041 {
0042     kref_put(&timeline->kref, __intel_timeline_free);
0043 }
0044
0045 static inline int __intel_timeline_sync_set(struct intel_timeline *tl,
0046                         u64 context, u32 seqno)
0047 {
0048     return i915_syncmap_set(&tl->sync, context, seqno);
0049 }
0050
0051 static inline int intel_timeline_sync_set(struct intel_timeline *tl,
0052                       const struct dma_fence *fence)
0053 {
0054     return __intel_timeline_sync_set(tl, fence->context, fence->seqno);
0055 }
0056
0057 static inline bool __intel_timeline_sync_is_later(struct intel_timeline *tl,
0058                           u64 context, u32 seqno)
0059 {
0060     return i915_syncmap_is_later(&tl->sync, context, seqno);
0061 }
0062
0063 static inline bool intel_timeline_sync_is_later(struct intel_timeline *tl,
0064                         const struct dma_fence *fence)
0065 {
0066     return __intel_timeline_sync_is_later(tl, fence->context, fence->seqno);
0067 }
0068
0069 void __intel_timeline_pin(struct intel_timeline *tl);
0070 int intel_timeline_pin(struct intel_timeline *tl, struct i915_gem_ww_ctx *ww);
0071 void intel_timeline_enter(struct intel_timeline *tl);
0072 int intel_timeline_get_seqno(struct intel_timeline *tl,
0073                  struct i915_request *rq,
0074                  u32 *seqno);
0075 void intel_timeline_exit(struct intel_timeline *tl);
0076 void intel_timeline_unpin(struct intel_timeline *tl);
0077
0078 void intel_timeline_reset_seqno(const struct intel_timeline *tl);
0079
0080 int intel_timeline_read_hwsp(struct i915_request *from,
0081                  struct i915_request *until,
0082                  u32 *hwsp_offset);
0083
0084 void intel_gt_init_timelines(struct intel_gt *gt);
0085 void intel_gt_fini_timelines(struct intel_gt *gt);
0086
0087 void intel_gt_show_timelines(struct intel_gt *gt,
0088                  struct drm_printer *m,
0089                  void (*show_request)(struct drm_printer *m,
0090                           const struct i915_request *rq,
0091                           const char *prefix,
0092                           int indent));
0093
0094 static inline bool
0095 intel_timeline_is_last(const struct intel_timeline *tl,
0096                const struct i915_request *rq)
0097 {
0098     return list_is_last_rcu(&rq->link, &tl->requests);
0099 }
0100
0101 I915_SELFTEST_DECLARE(int intel_timeline_pin_map(struct intel_timeline *tl));
0102
0103 #endif