i915/gt/intel_renderstate.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2014 Intel Corporation
0004  */
0005
0006 #ifndef _INTEL_RENDERSTATE_H_
0007 #define _INTEL_RENDERSTATE_H_
0008
0009 #include <linux/types.h>
0010 #include "i915_gem.h"
0011 #include "i915_gem_ww.h"
0012
0013 struct i915_request;
0014 struct intel_context;
0015 struct i915_vma;
0016
0017 struct intel_renderstate_rodata {
0018     const u32 *reloc;
0019     const u32 *batch;
0020     const u32 batch_items;
0021 };
0022
0023 #define RO_RENDERSTATE(_g)                      \
0024     const struct intel_renderstate_rodata gen ## _g ## _null_state = { \
0025         .reloc = gen ## _g ## _null_state_relocs,       \
0026         .batch = gen ## _g ## _null_state_batch,        \
0027         .batch_items = sizeof(gen ## _g ## _null_state_batch)/4, \
0028     }
0029
0030 extern const struct intel_renderstate_rodata gen6_null_state;
0031 extern const struct intel_renderstate_rodata gen7_null_state;
0032 extern const struct intel_renderstate_rodata gen8_null_state;
0033 extern const struct intel_renderstate_rodata gen9_null_state;
0034
0035 struct intel_renderstate {
0036     struct i915_gem_ww_ctx ww;
0037     const struct intel_renderstate_rodata *rodata;
0038     struct i915_vma *vma;
0039     u32 batch_offset;
0040     u32 batch_size;
0041     u32 aux_offset;
0042     u32 aux_size;
0043 };
0044
0045 int intel_renderstate_init(struct intel_renderstate *so,
0046                struct intel_context *ce);
0047 int intel_renderstate_emit(struct intel_renderstate *so,
0048                struct i915_request *rq);
0049 void intel_renderstate_fini(struct intel_renderstate *so,
0050                 struct intel_context *ce);
0051
0052 #endif /* _INTEL_RENDERSTATE_H_ */