i915/gt/intel_mocs.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2015 Intel Corporation
0004  */
0005
0006 #ifndef INTEL_MOCS_H
0007 #define INTEL_MOCS_H
0008
0009 /**
0010  * DOC: Memory Objects Control State (MOCS)
0011  *
0012  * Motivation:
0013  * In previous Gens the MOCS settings was a value that was set by user land as
0014  * part of the batch. In Gen9 this has changed to be a single table (per ring)
0015  * that all batches now reference by index instead of programming the MOCS
0016  * directly.
0017  *
0018  * The one wrinkle in this is that only PART of the MOCS tables are included
0019  * in context (The GFX_MOCS_0 - GFX_MOCS_64 and the LNCFCMOCS0 - LNCFCMOCS32
0020  * registers). The rest are not (the settings for the other rings).
0021  *
0022  * This table needs to be set at system start-up because the way the table
0023  * interacts with the contexts and the GmmLib interface.
0024  *
0025  *
0026  * Implementation:
0027  *
0028  * The tables (one per supported platform) are defined in intel_mocs.c
0029  * and are programmed in the first batch after the context is loaded
0030  * (with the hardware workarounds). This will then let the usual
0031  * context handling keep the MOCS in step.
0032  */
0033
0034 struct intel_engine_cs;
0035 struct intel_gt;
0036
0037 void intel_mocs_init(struct intel_gt *gt);
0038 void intel_mocs_init_engine(struct intel_engine_cs *engine);
0039 void intel_set_mocs_index(struct intel_gt *gt);
0040
0041 #endif