i915/gt/intel_gt.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2019 Intel Corporation
0004  */
0005
0006 #ifndef __INTEL_GT__
0007 #define __INTEL_GT__
0008
0009 #include "intel_engine_types.h"
0010 #include "intel_gt_types.h"
0011 #include "intel_reset.h"
0012
0013 struct drm_i915_private;
0014 struct drm_printer;
0015
0016 #define GT_TRACE(gt, fmt, ...) do {                 \
0017     const struct intel_gt *gt__ __maybe_unused = (gt);      \
0018     GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev),     \
0019           ##__VA_ARGS__);                   \
0020 } while (0)
0021
0022 static inline bool gt_is_root(struct intel_gt *gt)
0023 {
0024     return !gt->info.id;
0025 }
0026
0027 static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
0028 {
0029     return container_of(uc, struct intel_gt, uc);
0030 }
0031
0032 static inline struct intel_gt *guc_to_gt(struct intel_guc *guc)
0033 {
0034     return container_of(guc, struct intel_gt, uc.guc);
0035 }
0036
0037 static inline struct intel_gt *huc_to_gt(struct intel_huc *huc)
0038 {
0039     return container_of(huc, struct intel_gt, uc.huc);
0040 }
0041
0042 static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc)
0043 {
0044     return container_of(gsc, struct intel_gt, gsc);
0045 }
0046
0047 void intel_root_gt_init_early(struct drm_i915_private *i915);
0048 int intel_gt_assign_ggtt(struct intel_gt *gt);
0049 int intel_gt_init_mmio(struct intel_gt *gt);
0050 int __must_check intel_gt_init_hw(struct intel_gt *gt);
0051 int intel_gt_init(struct intel_gt *gt);
0052 void intel_gt_driver_register(struct intel_gt *gt);
0053
0054 void intel_gt_driver_unregister(struct intel_gt *gt);
0055 void intel_gt_driver_remove(struct intel_gt *gt);
0056 void intel_gt_driver_release(struct intel_gt *gt);
0057
0058 void intel_gt_driver_late_release_all(struct drm_i915_private *i915);
0059
0060 int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout);
0061
0062 void intel_gt_check_and_clear_faults(struct intel_gt *gt);
0063 void intel_gt_clear_error_registers(struct intel_gt *gt,
0064                     intel_engine_mask_t engine_mask);
0065
0066 void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
0067 void intel_gt_chipset_flush(struct intel_gt *gt);
0068
0069 static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
0070                       enum intel_gt_scratch_field field)
0071 {
0072     return i915_ggtt_offset(gt->scratch) + field;
0073 }
0074
0075 static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt)
0076 {
0077     return test_bit(I915_WEDGED_ON_INIT, &gt->reset.flags) ||
0078            test_bit(I915_WEDGED_ON_FINI, &gt->reset.flags);
0079 }
0080
0081 static inline bool intel_gt_is_wedged(const struct intel_gt *gt)
0082 {
0083     GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) &&
0084            !test_bit(I915_WEDGED, &gt->reset.flags));
0085
0086     return unlikely(test_bit(I915_WEDGED, &gt->reset.flags));
0087 }
0088
0089 int intel_gt_probe_all(struct drm_i915_private *i915);
0090 int intel_gt_tiles_init(struct drm_i915_private *i915);
0091 void intel_gt_release_all(struct drm_i915_private *i915);
0092
0093 #define for_each_gt(gt__, i915__, id__) \
0094     for ((id__) = 0; \
0095          (id__) < I915_MAX_GT; \
0096          (id__)++) \
0097         for_each_if(((gt__) = (i915__)->gt[(id__)]))
0098
0099 void intel_gt_info_print(const struct intel_gt_info *info,
0100              struct drm_printer *p);
0101
0102 void intel_gt_watchdog_work(struct work_struct *work);
0103
0104 static inline u32 intel_gt_tlb_seqno(const struct intel_gt *gt)
0105 {
0106     return seqprop_sequence(&gt->tlb.seqno);
0107 }
0108
0109 static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
0110 {
0111     return intel_gt_tlb_seqno(gt) | 1;
0112 }
0113
0114 void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
0115
0116 #endif /* __INTEL_GT_H__ */