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0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright(c) 2019-2022, Intel Corporation. All rights reserved.
0004  */
0005 #ifndef __INTEL_GSC_DEV_H__
0006 #define __INTEL_GSC_DEV_H__
0007 
0008 #include <linux/types.h>
0009 
0010 struct drm_i915_private;
0011 struct intel_gt;
0012 struct mei_aux_device;
0013 
0014 #define INTEL_GSC_NUM_INTERFACES 2
0015 /*
0016  * The HECI1 bit corresponds to bit15 and HECI2 to bit14.
0017  * The reason for this is to allow growth for more interfaces in the future.
0018  */
0019 #define GSC_IRQ_INTF(_x)  BIT(15 - (_x))
0020 
0021 /**
0022  * struct intel_gsc - graphics security controller
0023  * @intf : gsc interface
0024  */
0025 struct intel_gsc {
0026     struct intel_gsc_intf {
0027         struct mei_aux_device *adev;
0028         int irq;
0029         unsigned int id;
0030     } intf[INTEL_GSC_NUM_INTERFACES];
0031 };
0032 
0033 void intel_gsc_init(struct intel_gsc *gsc, struct drm_i915_private *dev_priv);
0034 void intel_gsc_fini(struct intel_gsc *gsc);
0035 void intel_gsc_irq_handler(struct intel_gt *gt, u32 iir);
0036 
0037 #endif /* __INTEL_GSC_DEV_H__ */