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0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2019 Intel Corporation
0004  */
0005 
0006 #ifndef __INTEL_CONTEXT_H__
0007 #define __INTEL_CONTEXT_H__
0008 
0009 #include <linux/bitops.h>
0010 #include <linux/lockdep.h>
0011 #include <linux/types.h>
0012 
0013 #include "i915_active.h"
0014 #include "i915_drv.h"
0015 #include "intel_context_types.h"
0016 #include "intel_engine_types.h"
0017 #include "intel_ring_types.h"
0018 #include "intel_timeline_types.h"
0019 #include "i915_trace.h"
0020 
0021 #define CE_TRACE(ce, fmt, ...) do {                 \
0022     const struct intel_context *ce__ = (ce);            \
0023     ENGINE_TRACE(ce__->engine, "context:%llx " fmt,         \
0024              ce__->timeline->fence_context,         \
0025              ##__VA_ARGS__);                    \
0026 } while (0)
0027 
0028 #define INTEL_CONTEXT_BANNED_PREEMPT_TIMEOUT_MS (1)
0029 
0030 struct i915_gem_ww_ctx;
0031 
0032 void intel_context_init(struct intel_context *ce,
0033             struct intel_engine_cs *engine);
0034 void intel_context_fini(struct intel_context *ce);
0035 
0036 void i915_context_module_exit(void);
0037 int i915_context_module_init(void);
0038 
0039 struct intel_context *
0040 intel_context_create(struct intel_engine_cs *engine);
0041 
0042 int intel_context_alloc_state(struct intel_context *ce);
0043 
0044 void intel_context_free(struct intel_context *ce);
0045 
0046 int intel_context_reconfigure_sseu(struct intel_context *ce,
0047                    const struct intel_sseu sseu);
0048 
0049 #define PARENT_SCRATCH_SIZE PAGE_SIZE
0050 
0051 static inline bool intel_context_is_child(struct intel_context *ce)
0052 {
0053     return !!ce->parallel.parent;
0054 }
0055 
0056 static inline bool intel_context_is_parent(struct intel_context *ce)
0057 {
0058     return !!ce->parallel.number_children;
0059 }
0060 
0061 static inline bool intel_context_is_pinned(struct intel_context *ce);
0062 
0063 static inline struct intel_context *
0064 intel_context_to_parent(struct intel_context *ce)
0065 {
0066     if (intel_context_is_child(ce)) {
0067         /*
0068          * The parent holds ref count to the child so it is always safe
0069          * for the parent to access the child, but the child has a
0070          * pointer to the parent without a ref. To ensure this is safe
0071          * the child should only access the parent pointer while the
0072          * parent is pinned.
0073          */
0074         GEM_BUG_ON(!intel_context_is_pinned(ce->parallel.parent));
0075 
0076         return ce->parallel.parent;
0077     } else {
0078         return ce;
0079     }
0080 }
0081 
0082 static inline bool intel_context_is_parallel(struct intel_context *ce)
0083 {
0084     return intel_context_is_child(ce) || intel_context_is_parent(ce);
0085 }
0086 
0087 void intel_context_bind_parent_child(struct intel_context *parent,
0088                      struct intel_context *child);
0089 
0090 #define for_each_child(parent, ce)\
0091     list_for_each_entry(ce, &(parent)->parallel.child_list,\
0092                 parallel.child_link)
0093 #define for_each_child_safe(parent, ce, cn)\
0094     list_for_each_entry_safe(ce, cn, &(parent)->parallel.child_list,\
0095                  parallel.child_link)
0096 
0097 /**
0098  * intel_context_lock_pinned - Stablises the 'pinned' status of the HW context
0099  * @ce - the context
0100  *
0101  * Acquire a lock on the pinned status of the HW context, such that the context
0102  * can neither be bound to the GPU or unbound whilst the lock is held, i.e.
0103  * intel_context_is_pinned() remains stable.
0104  */
0105 static inline int intel_context_lock_pinned(struct intel_context *ce)
0106     __acquires(ce->pin_mutex)
0107 {
0108     return mutex_lock_interruptible(&ce->pin_mutex);
0109 }
0110 
0111 /**
0112  * intel_context_is_pinned - Reports the 'pinned' status
0113  * @ce - the context
0114  *
0115  * While in use by the GPU, the context, along with its ring and page
0116  * tables is pinned into memory and the GTT.
0117  *
0118  * Returns: true if the context is currently pinned for use by the GPU.
0119  */
0120 static inline bool
0121 intel_context_is_pinned(struct intel_context *ce)
0122 {
0123     return atomic_read(&ce->pin_count);
0124 }
0125 
0126 static inline void intel_context_cancel_request(struct intel_context *ce,
0127                         struct i915_request *rq)
0128 {
0129     GEM_BUG_ON(!ce->ops->cancel_request);
0130     return ce->ops->cancel_request(ce, rq);
0131 }
0132 
0133 /**
0134  * intel_context_unlock_pinned - Releases the earlier locking of 'pinned' status
0135  * @ce - the context
0136  *
0137  * Releases the lock earlier acquired by intel_context_unlock_pinned().
0138  */
0139 static inline void intel_context_unlock_pinned(struct intel_context *ce)
0140     __releases(ce->pin_mutex)
0141 {
0142     mutex_unlock(&ce->pin_mutex);
0143 }
0144 
0145 int __intel_context_do_pin(struct intel_context *ce);
0146 int __intel_context_do_pin_ww(struct intel_context *ce,
0147                   struct i915_gem_ww_ctx *ww);
0148 
0149 static inline bool intel_context_pin_if_active(struct intel_context *ce)
0150 {
0151     return atomic_inc_not_zero(&ce->pin_count);
0152 }
0153 
0154 static inline int intel_context_pin(struct intel_context *ce)
0155 {
0156     if (likely(intel_context_pin_if_active(ce)))
0157         return 0;
0158 
0159     return __intel_context_do_pin(ce);
0160 }
0161 
0162 static inline int intel_context_pin_ww(struct intel_context *ce,
0163                        struct i915_gem_ww_ctx *ww)
0164 {
0165     if (likely(intel_context_pin_if_active(ce)))
0166         return 0;
0167 
0168     return __intel_context_do_pin_ww(ce, ww);
0169 }
0170 
0171 static inline void __intel_context_pin(struct intel_context *ce)
0172 {
0173     GEM_BUG_ON(!intel_context_is_pinned(ce));
0174     atomic_inc(&ce->pin_count);
0175 }
0176 
0177 void __intel_context_do_unpin(struct intel_context *ce, int sub);
0178 
0179 static inline void intel_context_sched_disable_unpin(struct intel_context *ce)
0180 {
0181     __intel_context_do_unpin(ce, 2);
0182 }
0183 
0184 static inline void intel_context_unpin(struct intel_context *ce)
0185 {
0186     if (!ce->ops->sched_disable) {
0187         __intel_context_do_unpin(ce, 1);
0188     } else {
0189         /*
0190          * Move ownership of this pin to the scheduling disable which is
0191          * an async operation. When that operation completes the above
0192          * intel_context_sched_disable_unpin is called potentially
0193          * unpinning the context.
0194          */
0195         while (!atomic_add_unless(&ce->pin_count, -1, 1)) {
0196             if (atomic_cmpxchg(&ce->pin_count, 1, 2) == 1) {
0197                 ce->ops->sched_disable(ce);
0198                 break;
0199             }
0200         }
0201     }
0202 }
0203 
0204 void intel_context_enter_engine(struct intel_context *ce);
0205 void intel_context_exit_engine(struct intel_context *ce);
0206 
0207 static inline void intel_context_enter(struct intel_context *ce)
0208 {
0209     lockdep_assert_held(&ce->timeline->mutex);
0210     if (!ce->active_count++)
0211         ce->ops->enter(ce);
0212 }
0213 
0214 static inline void intel_context_mark_active(struct intel_context *ce)
0215 {
0216     lockdep_assert(lockdep_is_held(&ce->timeline->mutex) ||
0217                test_bit(CONTEXT_IS_PARKING, &ce->flags));
0218     ++ce->active_count;
0219 }
0220 
0221 static inline void intel_context_exit(struct intel_context *ce)
0222 {
0223     lockdep_assert_held(&ce->timeline->mutex);
0224     GEM_BUG_ON(!ce->active_count);
0225     if (!--ce->active_count)
0226         ce->ops->exit(ce);
0227 }
0228 
0229 static inline struct intel_context *intel_context_get(struct intel_context *ce)
0230 {
0231     kref_get(&ce->ref);
0232     return ce;
0233 }
0234 
0235 static inline void intel_context_put(struct intel_context *ce)
0236 {
0237     kref_put(&ce->ref, ce->ops->destroy);
0238 }
0239 
0240 static inline struct intel_timeline *__must_check
0241 intel_context_timeline_lock(struct intel_context *ce)
0242     __acquires(&ce->timeline->mutex)
0243 {
0244     struct intel_timeline *tl = ce->timeline;
0245     int err;
0246 
0247     if (intel_context_is_parent(ce))
0248         err = mutex_lock_interruptible_nested(&tl->mutex, 0);
0249     else if (intel_context_is_child(ce))
0250         err = mutex_lock_interruptible_nested(&tl->mutex,
0251                               ce->parallel.child_index + 1);
0252     else
0253         err = mutex_lock_interruptible(&tl->mutex);
0254     if (err)
0255         return ERR_PTR(err);
0256 
0257     return tl;
0258 }
0259 
0260 static inline void intel_context_timeline_unlock(struct intel_timeline *tl)
0261     __releases(&tl->mutex)
0262 {
0263     mutex_unlock(&tl->mutex);
0264 }
0265 
0266 int intel_context_prepare_remote_request(struct intel_context *ce,
0267                      struct i915_request *rq);
0268 
0269 struct i915_request *intel_context_create_request(struct intel_context *ce);
0270 
0271 struct i915_request *
0272 intel_context_find_active_request(struct intel_context *ce);
0273 
0274 static inline bool intel_context_is_barrier(const struct intel_context *ce)
0275 {
0276     return test_bit(CONTEXT_BARRIER_BIT, &ce->flags);
0277 }
0278 
0279 static inline bool intel_context_is_closed(const struct intel_context *ce)
0280 {
0281     return test_bit(CONTEXT_CLOSED_BIT, &ce->flags);
0282 }
0283 
0284 static inline bool intel_context_has_inflight(const struct intel_context *ce)
0285 {
0286     return test_bit(COPS_HAS_INFLIGHT_BIT, &ce->ops->flags);
0287 }
0288 
0289 static inline bool intel_context_use_semaphores(const struct intel_context *ce)
0290 {
0291     return test_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
0292 }
0293 
0294 static inline void intel_context_set_use_semaphores(struct intel_context *ce)
0295 {
0296     set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
0297 }
0298 
0299 static inline void intel_context_clear_use_semaphores(struct intel_context *ce)
0300 {
0301     clear_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
0302 }
0303 
0304 static inline bool intel_context_is_banned(const struct intel_context *ce)
0305 {
0306     return test_bit(CONTEXT_BANNED, &ce->flags);
0307 }
0308 
0309 static inline bool intel_context_set_banned(struct intel_context *ce)
0310 {
0311     return test_and_set_bit(CONTEXT_BANNED, &ce->flags);
0312 }
0313 
0314 bool intel_context_ban(struct intel_context *ce, struct i915_request *rq);
0315 
0316 static inline bool intel_context_is_schedulable(const struct intel_context *ce)
0317 {
0318     return !test_bit(CONTEXT_EXITING, &ce->flags) &&
0319            !test_bit(CONTEXT_BANNED, &ce->flags);
0320 }
0321 
0322 static inline bool intel_context_is_exiting(const struct intel_context *ce)
0323 {
0324     return test_bit(CONTEXT_EXITING, &ce->flags);
0325 }
0326 
0327 static inline bool intel_context_set_exiting(struct intel_context *ce)
0328 {
0329     return test_and_set_bit(CONTEXT_EXITING, &ce->flags);
0330 }
0331 
0332 bool intel_context_exit_nonpersistent(struct intel_context *ce,
0333                       struct i915_request *rq);
0334 
0335 static inline bool
0336 intel_context_force_single_submission(const struct intel_context *ce)
0337 {
0338     return test_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, &ce->flags);
0339 }
0340 
0341 static inline void
0342 intel_context_set_single_submission(struct intel_context *ce)
0343 {
0344     __set_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, &ce->flags);
0345 }
0346 
0347 static inline bool
0348 intel_context_nopreempt(const struct intel_context *ce)
0349 {
0350     return test_bit(CONTEXT_NOPREEMPT, &ce->flags);
0351 }
0352 
0353 static inline void
0354 intel_context_set_nopreempt(struct intel_context *ce)
0355 {
0356     set_bit(CONTEXT_NOPREEMPT, &ce->flags);
0357 }
0358 
0359 static inline void
0360 intel_context_clear_nopreempt(struct intel_context *ce)
0361 {
0362     clear_bit(CONTEXT_NOPREEMPT, &ce->flags);
0363 }
0364 
0365 u64 intel_context_get_total_runtime_ns(const struct intel_context *ce);
0366 u64 intel_context_get_avg_runtime_ns(struct intel_context *ce);
0367 
0368 static inline u64 intel_context_clock(void)
0369 {
0370     /* As we mix CS cycles with CPU clocks, use the raw monotonic clock. */
0371     return ktime_get_raw_fast_ns();
0372 }
0373 
0374 #endif /* __INTEL_CONTEXT_H__ */
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