i915/display/intel_gmbus.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2019 Intel Corporation
0004  */
0005
0006 #ifndef __INTEL_GMBUS_H__
0007 #define __INTEL_GMBUS_H__
0008
0009 #include <linux/types.h>
0010
0011 struct drm_i915_private;
0012 struct i2c_adapter;
0013
0014 #define GMBUS_PIN_DISABLED  0
0015 #define GMBUS_PIN_SSC       1
0016 #define GMBUS_PIN_VGADDC    2
0017 #define GMBUS_PIN_PANEL     3
0018 #define GMBUS_PIN_DPD_CHV   3 /* HDMID_CHV */
0019 #define GMBUS_PIN_DPC       4 /* HDMIC */
0020 #define GMBUS_PIN_DPB       5 /* SDVO, HDMIB */
0021 #define GMBUS_PIN_DPD       6 /* HDMID */
0022 #define GMBUS_PIN_RESERVED  7 /* 7 reserved */
0023 #define GMBUS_PIN_1_BXT     1 /* BXT+ (atom) and CNP+ (big core) */
0024 #define GMBUS_PIN_2_BXT     2
0025 #define GMBUS_PIN_3_BXT     3
0026 #define GMBUS_PIN_4_CNP     4
0027 #define GMBUS_PIN_9_TC1_ICP 9
0028 #define GMBUS_PIN_10_TC2_ICP    10
0029 #define GMBUS_PIN_11_TC3_ICP    11
0030 #define GMBUS_PIN_12_TC4_ICP    12
0031 #define GMBUS_PIN_13_TC5_TGP    13
0032 #define GMBUS_PIN_14_TC6_TGP    14
0033
0034 #define GMBUS_NUM_PINS  15 /* including 0 */
0035
0036 int intel_gmbus_setup(struct drm_i915_private *dev_priv);
0037 void intel_gmbus_teardown(struct drm_i915_private *dev_priv);
0038 bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
0039                   unsigned int pin);
0040 int intel_gmbus_output_aksv(struct i2c_adapter *adapter);
0041
0042 struct i2c_adapter *
0043 intel_gmbus_get_adapter(struct drm_i915_private *dev_priv, unsigned int pin);
0044 void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
0045 bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter);
0046 void intel_gmbus_reset(struct drm_i915_private *dev_priv);
0047
0048 #endif /* __INTEL_GMBUS_H__ */