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0001 /*
0002  * Copyright 2006 Dave Airlie <airlied@linux.ie>
0003  * Copyright © 2006-2007 Intel Corporation
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining a
0006  * copy of this software and associated documentation files (the "Software"),
0007  * to deal in the Software without restriction, including without limitation
0008  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0009  * and/or sell copies of the Software, and to permit persons to whom the
0010  * Software is furnished to do so, subject to the following conditions:
0011  *
0012  * The above copyright notice and this permission notice (including the next
0013  * paragraph) shall be included in all copies or substantial portions of the
0014  * Software.
0015  *
0016  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0017  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0018  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0019  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
0020  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0021  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
0022  * DEALINGS IN THE SOFTWARE.
0023  *
0024  * Authors:
0025  *  Eric Anholt <eric@anholt.net>
0026  */
0027 
0028 #include <linux/i2c.h>
0029 #include <linux/slab.h>
0030 
0031 #include <drm/drm_atomic_helper.h>
0032 #include <drm/drm_crtc.h>
0033 
0034 #include "i915_drv.h"
0035 #include "intel_connector.h"
0036 #include "intel_de.h"
0037 #include "intel_display_types.h"
0038 #include "intel_dvo.h"
0039 #include "intel_dvo_dev.h"
0040 #include "intel_gmbus.h"
0041 #include "intel_panel.h"
0042 
0043 #define INTEL_DVO_CHIP_NONE 0
0044 #define INTEL_DVO_CHIP_LVDS 1
0045 #define INTEL_DVO_CHIP_TMDS 2
0046 #define INTEL_DVO_CHIP_TVOUT    4
0047 #define INTEL_DVO_CHIP_LVDS_NO_FIXED    5
0048 
0049 #define SIL164_ADDR 0x38
0050 #define CH7xxx_ADDR 0x76
0051 #define TFP410_ADDR 0x38
0052 #define NS2501_ADDR     0x38
0053 
0054 static const struct intel_dvo_device intel_dvo_devices[] = {
0055     {
0056         .type = INTEL_DVO_CHIP_TMDS,
0057         .name = "sil164",
0058         .dvo_reg = DVOC,
0059         .dvo_srcdim_reg = DVOC_SRCDIM,
0060         .slave_addr = SIL164_ADDR,
0061         .dev_ops = &sil164_ops,
0062     },
0063     {
0064         .type = INTEL_DVO_CHIP_TMDS,
0065         .name = "ch7xxx",
0066         .dvo_reg = DVOC,
0067         .dvo_srcdim_reg = DVOC_SRCDIM,
0068         .slave_addr = CH7xxx_ADDR,
0069         .dev_ops = &ch7xxx_ops,
0070     },
0071     {
0072         .type = INTEL_DVO_CHIP_TMDS,
0073         .name = "ch7xxx",
0074         .dvo_reg = DVOC,
0075         .dvo_srcdim_reg = DVOC_SRCDIM,
0076         .slave_addr = 0x75, /* For some ch7010 */
0077         .dev_ops = &ch7xxx_ops,
0078     },
0079     {
0080         .type = INTEL_DVO_CHIP_LVDS,
0081         .name = "ivch",
0082         .dvo_reg = DVOA,
0083         .dvo_srcdim_reg = DVOA_SRCDIM,
0084         .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
0085         .dev_ops = &ivch_ops,
0086     },
0087     {
0088         .type = INTEL_DVO_CHIP_TMDS,
0089         .name = "tfp410",
0090         .dvo_reg = DVOC,
0091         .dvo_srcdim_reg = DVOC_SRCDIM,
0092         .slave_addr = TFP410_ADDR,
0093         .dev_ops = &tfp410_ops,
0094     },
0095     {
0096         .type = INTEL_DVO_CHIP_LVDS,
0097         .name = "ch7017",
0098         .dvo_reg = DVOC,
0099         .dvo_srcdim_reg = DVOC_SRCDIM,
0100         .slave_addr = 0x75,
0101         .gpio = GMBUS_PIN_DPB,
0102         .dev_ops = &ch7017_ops,
0103     },
0104     {
0105         .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
0106         .name = "ns2501",
0107         .dvo_reg = DVOB,
0108         .dvo_srcdim_reg = DVOB_SRCDIM,
0109         .slave_addr = NS2501_ADDR,
0110         .dev_ops = &ns2501_ops,
0111     },
0112 };
0113 
0114 struct intel_dvo {
0115     struct intel_encoder base;
0116 
0117     struct intel_dvo_device dev;
0118 
0119     struct intel_connector *attached_connector;
0120 
0121     bool panel_wants_dither;
0122 };
0123 
0124 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
0125 {
0126     return container_of(encoder, struct intel_dvo, base);
0127 }
0128 
0129 static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
0130 {
0131     return enc_to_dvo(intel_attached_encoder(connector));
0132 }
0133 
0134 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
0135 {
0136     struct drm_device *dev = connector->base.dev;
0137     struct drm_i915_private *dev_priv = to_i915(dev);
0138     struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
0139     u32 tmp;
0140 
0141     tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
0142 
0143     if (!(tmp & DVO_ENABLE))
0144         return false;
0145 
0146     return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
0147 }
0148 
0149 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
0150                    enum pipe *pipe)
0151 {
0152     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0153     struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
0154     u32 tmp;
0155 
0156     tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
0157 
0158     *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
0159 
0160     return tmp & DVO_ENABLE;
0161 }
0162 
0163 static void intel_dvo_get_config(struct intel_encoder *encoder,
0164                  struct intel_crtc_state *pipe_config)
0165 {
0166     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0167     struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
0168     u32 tmp, flags = 0;
0169 
0170     pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
0171 
0172     tmp = intel_de_read(dev_priv, intel_dvo->dev.dvo_reg);
0173     if (tmp & DVO_HSYNC_ACTIVE_HIGH)
0174         flags |= DRM_MODE_FLAG_PHSYNC;
0175     else
0176         flags |= DRM_MODE_FLAG_NHSYNC;
0177     if (tmp & DVO_VSYNC_ACTIVE_HIGH)
0178         flags |= DRM_MODE_FLAG_PVSYNC;
0179     else
0180         flags |= DRM_MODE_FLAG_NVSYNC;
0181 
0182     pipe_config->hw.adjusted_mode.flags |= flags;
0183 
0184     pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
0185 }
0186 
0187 static void intel_disable_dvo(struct intel_atomic_state *state,
0188                   struct intel_encoder *encoder,
0189                   const struct intel_crtc_state *old_crtc_state,
0190                   const struct drm_connector_state *old_conn_state)
0191 {
0192     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0193     struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
0194     i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
0195     u32 temp = intel_de_read(dev_priv, dvo_reg);
0196 
0197     intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
0198     intel_de_write(dev_priv, dvo_reg, temp & ~DVO_ENABLE);
0199     intel_de_read(dev_priv, dvo_reg);
0200 }
0201 
0202 static void intel_enable_dvo(struct intel_atomic_state *state,
0203                  struct intel_encoder *encoder,
0204                  const struct intel_crtc_state *pipe_config,
0205                  const struct drm_connector_state *conn_state)
0206 {
0207     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0208     struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
0209     i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
0210     u32 temp = intel_de_read(dev_priv, dvo_reg);
0211 
0212     intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
0213                      &pipe_config->hw.mode,
0214                      &pipe_config->hw.adjusted_mode);
0215 
0216     intel_de_write(dev_priv, dvo_reg, temp | DVO_ENABLE);
0217     intel_de_read(dev_priv, dvo_reg);
0218 
0219     intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
0220 }
0221 
0222 static enum drm_mode_status
0223 intel_dvo_mode_valid(struct drm_connector *connector,
0224              struct drm_display_mode *mode)
0225 {
0226     struct intel_connector *intel_connector = to_intel_connector(connector);
0227     struct intel_dvo *intel_dvo = intel_attached_dvo(intel_connector);
0228     const struct drm_display_mode *fixed_mode =
0229         intel_panel_fixed_mode(intel_connector, mode);
0230     int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
0231     int target_clock = mode->clock;
0232 
0233     if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
0234         return MODE_NO_DBLESCAN;
0235 
0236     /* XXX: Validate clock range */
0237 
0238     if (fixed_mode) {
0239         enum drm_mode_status status;
0240 
0241         status = intel_panel_mode_valid(intel_connector, mode);
0242         if (status != MODE_OK)
0243             return status;
0244 
0245         target_clock = fixed_mode->clock;
0246     }
0247 
0248     if (target_clock > max_dotclk)
0249         return MODE_CLOCK_HIGH;
0250 
0251     return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
0252 }
0253 
0254 static int intel_dvo_compute_config(struct intel_encoder *encoder,
0255                     struct intel_crtc_state *pipe_config,
0256                     struct drm_connector_state *conn_state)
0257 {
0258     struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
0259     struct intel_connector *connector = to_intel_connector(conn_state->connector);
0260     struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
0261     const struct drm_display_mode *fixed_mode =
0262         intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
0263 
0264     /*
0265      * If we have timings from the BIOS for the panel, put them in
0266      * to the adjusted mode.  The CRTC will be set up for this mode,
0267      * with the panel scaling set up to source from the H/VDisplay
0268      * of the original mode.
0269      */
0270     if (fixed_mode) {
0271         int ret;
0272 
0273         ret = intel_panel_compute_config(connector, adjusted_mode);
0274         if (ret)
0275             return ret;
0276     }
0277 
0278     if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
0279         return -EINVAL;
0280 
0281     pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
0282 
0283     return 0;
0284 }
0285 
0286 static void intel_dvo_pre_enable(struct intel_atomic_state *state,
0287                  struct intel_encoder *encoder,
0288                  const struct intel_crtc_state *pipe_config,
0289                  const struct drm_connector_state *conn_state)
0290 {
0291     struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0292     struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
0293     const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
0294     struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
0295     enum pipe pipe = crtc->pipe;
0296     u32 dvo_val;
0297     i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
0298     i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
0299 
0300     /* Save the data order, since I don't know what it should be set to. */
0301     dvo_val = intel_de_read(dev_priv, dvo_reg) &
0302           (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
0303     dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
0304            DVO_BLANK_ACTIVE_HIGH;
0305 
0306     dvo_val |= DVO_PIPE_SEL(pipe);
0307     dvo_val |= DVO_PIPE_STALL;
0308     if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
0309         dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
0310     if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
0311         dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
0312 
0313     intel_de_write(dev_priv, dvo_srcdim_reg,
0314                (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) | (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
0315     intel_de_write(dev_priv, dvo_reg, dvo_val);
0316 }
0317 
0318 static enum drm_connector_status
0319 intel_dvo_detect(struct drm_connector *connector, bool force)
0320 {
0321     struct drm_i915_private *i915 = to_i915(connector->dev);
0322     struct intel_dvo *intel_dvo = intel_attached_dvo(to_intel_connector(connector));
0323 
0324     DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
0325               connector->base.id, connector->name);
0326 
0327     if (!INTEL_DISPLAY_ENABLED(i915))
0328         return connector_status_disconnected;
0329 
0330     return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
0331 }
0332 
0333 static int intel_dvo_get_modes(struct drm_connector *connector)
0334 {
0335     struct drm_i915_private *dev_priv = to_i915(connector->dev);
0336     int num_modes;
0337 
0338     /*
0339      * We should probably have an i2c driver get_modes function for those
0340      * devices which will have a fixed set of modes determined by the chip
0341      * (TV-out, for example), but for now with just TMDS and LVDS,
0342      * that's not the case.
0343      */
0344     num_modes = intel_ddc_get_modes(connector,
0345                     intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
0346     if (num_modes)
0347         return num_modes;
0348 
0349     return intel_panel_get_modes(to_intel_connector(connector));
0350 }
0351 
0352 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
0353     .detect = intel_dvo_detect,
0354     .late_register = intel_connector_register,
0355     .early_unregister = intel_connector_unregister,
0356     .destroy = intel_connector_destroy,
0357     .fill_modes = drm_helper_probe_single_connector_modes,
0358     .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
0359     .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
0360 };
0361 
0362 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
0363     .mode_valid = intel_dvo_mode_valid,
0364     .get_modes = intel_dvo_get_modes,
0365 };
0366 
0367 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
0368 {
0369     struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
0370 
0371     if (intel_dvo->dev.dev_ops->destroy)
0372         intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
0373 
0374     intel_encoder_destroy(encoder);
0375 }
0376 
0377 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
0378     .destroy = intel_dvo_enc_destroy,
0379 };
0380 
0381 static enum port intel_dvo_port(i915_reg_t dvo_reg)
0382 {
0383     if (i915_mmio_reg_equal(dvo_reg, DVOA))
0384         return PORT_A;
0385     else if (i915_mmio_reg_equal(dvo_reg, DVOB))
0386         return PORT_B;
0387     else
0388         return PORT_C;
0389 }
0390 
0391 void intel_dvo_init(struct drm_i915_private *dev_priv)
0392 {
0393     struct intel_encoder *intel_encoder;
0394     struct intel_dvo *intel_dvo;
0395     struct intel_connector *intel_connector;
0396     int i;
0397     int encoder_type = DRM_MODE_ENCODER_NONE;
0398 
0399     intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
0400     if (!intel_dvo)
0401         return;
0402 
0403     intel_connector = intel_connector_alloc();
0404     if (!intel_connector) {
0405         kfree(intel_dvo);
0406         return;
0407     }
0408 
0409     intel_dvo->attached_connector = intel_connector;
0410 
0411     intel_encoder = &intel_dvo->base;
0412 
0413     intel_encoder->disable = intel_disable_dvo;
0414     intel_encoder->enable = intel_enable_dvo;
0415     intel_encoder->get_hw_state = intel_dvo_get_hw_state;
0416     intel_encoder->get_config = intel_dvo_get_config;
0417     intel_encoder->compute_config = intel_dvo_compute_config;
0418     intel_encoder->pre_enable = intel_dvo_pre_enable;
0419     intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
0420 
0421     /* Now, try to find a controller */
0422     for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
0423         struct drm_connector *connector = &intel_connector->base;
0424         const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
0425         struct i2c_adapter *i2c;
0426         int gpio;
0427         bool dvoinit;
0428         enum pipe pipe;
0429         u32 dpll[I915_MAX_PIPES];
0430         enum port port;
0431 
0432         /*
0433          * Allow the I2C driver info to specify the GPIO to be used in
0434          * special cases, but otherwise default to what's defined
0435          * in the spec.
0436          */
0437         if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
0438             gpio = dvo->gpio;
0439         else if (dvo->type == INTEL_DVO_CHIP_LVDS)
0440             gpio = GMBUS_PIN_SSC;
0441         else
0442             gpio = GMBUS_PIN_DPB;
0443 
0444         /*
0445          * Set up the I2C bus necessary for the chip we're probing.
0446          * It appears that everything is on GPIOE except for panels
0447          * on i830 laptops, which are on GPIOB (DVOA).
0448          */
0449         i2c = intel_gmbus_get_adapter(dev_priv, gpio);
0450 
0451         intel_dvo->dev = *dvo;
0452 
0453         /*
0454          * GMBUS NAK handling seems to be unstable, hence let the
0455          * transmitter detection run in bit banging mode for now.
0456          */
0457         intel_gmbus_force_bit(i2c, true);
0458 
0459         /*
0460          * ns2501 requires the DVO 2x clock before it will
0461          * respond to i2c accesses, so make sure we have
0462          * have the clock enabled before we attempt to
0463          * initialize the device.
0464          */
0465         for_each_pipe(dev_priv, pipe) {
0466             dpll[pipe] = intel_de_read(dev_priv, DPLL(pipe));
0467             intel_de_write(dev_priv, DPLL(pipe),
0468                        dpll[pipe] | DPLL_DVO_2X_MODE);
0469         }
0470 
0471         dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
0472 
0473         /* restore the DVO 2x clock state to original */
0474         for_each_pipe(dev_priv, pipe) {
0475             intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
0476         }
0477 
0478         intel_gmbus_force_bit(i2c, false);
0479 
0480         if (!dvoinit)
0481             continue;
0482 
0483         port = intel_dvo_port(dvo->dvo_reg);
0484         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
0485                  &intel_dvo_enc_funcs, encoder_type,
0486                  "DVO %c", port_name(port));
0487 
0488         intel_encoder->type = INTEL_OUTPUT_DVO;
0489         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
0490         intel_encoder->port = port;
0491         intel_encoder->pipe_mask = ~0;
0492 
0493         if (dvo->type != INTEL_DVO_CHIP_LVDS)
0494             intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
0495                 (1 << INTEL_OUTPUT_DVO);
0496 
0497         switch (dvo->type) {
0498         case INTEL_DVO_CHIP_TMDS:
0499             intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT |
0500                 DRM_CONNECTOR_POLL_DISCONNECT;
0501             drm_connector_init(&dev_priv->drm, connector,
0502                        &intel_dvo_connector_funcs,
0503                        DRM_MODE_CONNECTOR_DVII);
0504             encoder_type = DRM_MODE_ENCODER_TMDS;
0505             break;
0506         case INTEL_DVO_CHIP_LVDS_NO_FIXED:
0507         case INTEL_DVO_CHIP_LVDS:
0508             drm_connector_init(&dev_priv->drm, connector,
0509                        &intel_dvo_connector_funcs,
0510                        DRM_MODE_CONNECTOR_LVDS);
0511             encoder_type = DRM_MODE_ENCODER_LVDS;
0512             break;
0513         }
0514 
0515         drm_connector_helper_add(connector,
0516                      &intel_dvo_connector_helper_funcs);
0517         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
0518         connector->interlace_allowed = false;
0519         connector->doublescan_allowed = false;
0520 
0521         intel_connector_attach_encoder(intel_connector, intel_encoder);
0522         if (dvo->type == INTEL_DVO_CHIP_LVDS) {
0523             /*
0524              * For our LVDS chipsets, we should hopefully be able
0525              * to dig the fixed panel mode out of the BIOS data.
0526              * However, it's in a different format from the BIOS
0527              * data on chipsets with integrated LVDS (stored in AIM
0528              * headers, likely), so for now, just get the current
0529              * mode being output through DVO.
0530              */
0531             intel_panel_add_encoder_fixed_mode(intel_connector,
0532                                intel_encoder);
0533 
0534             intel_panel_init(intel_connector);
0535 
0536             intel_dvo->panel_wants_dither = true;
0537         }
0538 
0539         return;
0540     }
0541 
0542     kfree(intel_dvo);
0543     kfree(intel_connector);
0544 }
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