i915/display/intel_ddi_buf_trans.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2020 Intel Corporation
0004  */
0005
0006 #ifndef _INTEL_DDI_BUF_TRANS_H_
0007 #define _INTEL_DDI_BUF_TRANS_H_
0008
0009 #include <linux/types.h>
0010
0011 struct drm_i915_private;
0012 struct intel_encoder;
0013 struct intel_crtc_state;
0014
0015 struct hsw_ddi_buf_trans {
0016     u32 trans1; /* balance leg enable, de-emph level */
0017     u32 trans2; /* vref sel, vswing */
0018     u8 i_boost; /* SKL: I_boost; valid: 0x0, 0x1, 0x3, 0x7 */
0019 };
0020
0021 struct bxt_ddi_buf_trans {
0022     u8 margin;  /* swing value */
0023     u8 scale;   /* scale value */
0024     u8 enable;  /* scale enable */
0025     u8 deemphasis;
0026 };
0027
0028 struct icl_ddi_buf_trans {
0029     u8 dw2_swing_sel;
0030     u8 dw7_n_scalar;
0031     u8 dw4_cursor_coeff;
0032     u8 dw4_post_cursor_2;
0033     u8 dw4_post_cursor_1;
0034 };
0035
0036 struct icl_mg_phy_ddi_buf_trans {
0037     u8 cri_txdeemph_override_11_6;
0038     u8 cri_txdeemph_override_5_0;
0039     u8 cri_txdeemph_override_17_12;
0040 };
0041
0042 struct tgl_dkl_phy_ddi_buf_trans {
0043     u8 vswing;
0044     u8 preshoot;
0045     u8 de_emphasis;
0046 };
0047
0048 struct dg2_snps_phy_buf_trans {
0049     u8 vswing;
0050     u8 pre_cursor;
0051     u8 post_cursor;
0052 };
0053
0054 union intel_ddi_buf_trans_entry {
0055     struct hsw_ddi_buf_trans hsw;
0056     struct bxt_ddi_buf_trans bxt;
0057     struct icl_ddi_buf_trans icl;
0058     struct icl_mg_phy_ddi_buf_trans mg;
0059     struct tgl_dkl_phy_ddi_buf_trans dkl;
0060     struct dg2_snps_phy_buf_trans snps;
0061 };
0062
0063 struct intel_ddi_buf_trans {
0064     const union intel_ddi_buf_trans_entry *entries;
0065     u8 num_entries;
0066     u8 hdmi_default_entry;
0067 };
0068
0069 bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
0070
0071 void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
0072
0073 #endif