i915/display/intel_ddi.h

0001 /* SPDX-License-Identifier: MIT */
0002 /*
0003  * Copyright © 2019 Intel Corporation
0004  */
0005
0006 #ifndef __INTEL_DDI_H__
0007 #define __INTEL_DDI_H__
0008
0009 #include "i915_reg_defs.h"
0010
0011 struct drm_connector_state;
0012 struct drm_i915_private;
0013 struct intel_atomic_state;
0014 struct intel_connector;
0015 struct intel_crtc;
0016 struct intel_crtc_state;
0017 struct intel_dp;
0018 struct intel_dpll_hw_state;
0019 struct intel_encoder;
0020 struct intel_shared_dpll;
0021 enum pipe;
0022 enum port;
0023 enum transcoder;
0024
0025 i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
0026              const struct intel_crtc_state *crtc_state);
0027 i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
0028                 const struct intel_crtc_state *crtc_state);
0029 void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
0030                 struct intel_encoder *intel_encoder,
0031                 const struct intel_crtc_state *old_crtc_state,
0032                 const struct drm_connector_state *old_conn_state);
0033 void intel_ddi_enable_clock(struct intel_encoder *encoder,
0034                 const struct intel_crtc_state *crtc_state);
0035 void intel_ddi_disable_clock(struct intel_encoder *encoder);
0036 void intel_ddi_get_clock(struct intel_encoder *encoder,
0037              struct intel_crtc_state *crtc_state,
0038              struct intel_shared_dpll *pll);
0039 void hsw_ddi_enable_clock(struct intel_encoder *encoder,
0040               const struct intel_crtc_state *crtc_state);
0041 void hsw_ddi_disable_clock(struct intel_encoder *encoder);
0042 bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
0043 void hsw_ddi_get_config(struct intel_encoder *encoder,
0044             struct intel_crtc_state *crtc_state);
0045 struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
0046 void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
0047                 const struct intel_crtc_state *crtc_state);
0048 void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
0049                  enum port port);
0050 void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
0051 bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
0052 void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
0053                       const struct intel_crtc_state *crtc_state);
0054 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
0055 void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
0056                  const struct intel_crtc_state *crtc_state);
0057 void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);
0058 void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
0059               const struct drm_connector_state *conn_state);
0060 bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
0061 void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
0062                     bool state);
0063 void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
0064                      struct intel_crtc_state *crtc_state);
0065 int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
0066                    enum transcoder cpu_transcoder,
0067                    bool enable, u32 hdcp_mask);
0068 void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
0069 int intel_ddi_level(struct intel_encoder *encoder,
0070             const struct intel_crtc_state *crtc_state,
0071             int lane);
0072
0073 #endif /* __INTEL_DDI_H__ */